 List p=16F877A
 #include <p16F877A.inc>
 #include <ComDef.inc>
;-----------------------------------------------------
; Control bits
;-----------------------------------------------------

__CONFIG _CP_OFF & _WDT_OFF & _HS_OSC & _LVP_OFF

;------------------------------------------------------
; Decliation
;------------------------------------------------------
	CNT1		EQU		20H			; Timer 100uS
	CNT2		EQU		21H			;
	CNT3		EQU		22H			;
	CNT4		EQU		23H			;
	CNT5		EQU		24H			;
	CNT6		EQU		25H			;
	DP_DATA		EQU		26H			; LCD Data
	LOOP_P1 	EQU		27H			; Loop Counter1
	LOOP_P2		EQU		28H			; Loop Counter2
	Page_Ad 	EQU		29H			; Page Address
	Line		EQU		2AH			; Line Address
	LCD_CHR 	EQU		2BH			; Writting character data
	LOOP_P3		EQU		2CH			; Loop Counter (For Large dedit display)
	LOOP_P4		EQU		2DH			; Loop Counter (For LArge degit display)
	D_POS1		EQU		2EH			; LArge Degit Position 1 Data
	D_POS2		EQU		2FH			; LArge Degit Position 2 Data
	D_POS3		EQU		30H			; LArge Degit Position 3 Data
	D_POS4		EQU		31H			; LArge Degit Position 4 Data
	D_POS5		EQU		32H			; LArge Degit Position 5 Data
	D_POS6		EQU		33H			; LArge Degit Position 6 Data
	D_POS7		EQU		34H			; LArge Degit Position 7 Data
	D_POS8		EQU		35H			; LArge Degit Position 8 Data
	PCLSTR		EQU		36H			; PCLATH Store area
	OFFSET1		EQU		37H			; Large Offset by character defference (Low)
	OFFSET2 	EQU		38H			; Large Offset by Character defference (High)
	OFFSET3 	EQU		39H			; Small Offset by Character defference  

	BIN_L		EQU		3AH			; Frequency Binary Data Low byte (Work Area)
	BIN_H		EQU		3BH			; Frequency Binary Data High byte (Work Area)
	R0			EQU		3CH			; BCD DATA
	R1			EQU		3DH			; BCD DATA
	R2			EQU		3EH			; BCD DATA
	Count		EQU		3FH			; Count Work area
	Temp1		EQU		40H			; Workarea

	WTEMP		EQU		41H			; W reg to Store during interrupt
	STTEMP  	EQU		42H			; STATUS reg to store
	PULSEUP 	EQU		43H			; Encoder pulse multipiyer for up
	PULSEDW 	EQU		44H			; Encoder pulse multiplyer for down
	INC_MX		EQU		45H			; Frequency, Upper side limit flag
	DEC_MX		EQU		46H			; Frequency, Lower side limit flag
	BIN_L2  	EQU		47H			; Frequency Binary Data Low byte (Store Area)
	BIN_H2  	EQU		48H			; Frequency Binary Data High byte (Store Area)

	CNT7		EQU		49H			; 10uS timer
	Mode		EQU		50H			; Mode Data
	ENC_Mode	EQU		51H			; Encorder "Up" or "Down" ?
	STEP_RATE	EQU		52H			; Frequency step rate
	VFO_SEL		EQU     53H			; VFO Channel
	TRS_SEL		EQU		54H			; Transmit =01H /Receive =02H
	MEM_SEL		EQU		55H			; Memory related key is pressed

	DDSP_CT		EQU		58H			; PLL DDS Loop counter
	DDSP_DT_L	EQU		59H			; PLL DDS writing data low byte
	DDSP_DT_H	EQU		5AH			; PLL DDS writing data high byte
	DDSP_2W_L	EQU		5BH			; PLL DDS Lower data low byte
	DDSP_2W_H	EQU		5CH			; PLL DDS Lower data high byte

	PLL_LOW		EQU		5DH			; PLL Writing buffer for low byte
	PLL_MID		EQU		5EH			; PLL writing buffer for middle byte
	PLL_HIG		EQU		5FH			; PLL writing buffer for high byte
	PLL_ADR		EQU		60H			; TC9256P register address

	PLL_LPC		EQU		61H			; Loop counter when PLL data writing

	FREQ_PLL_AD	EQU		62H			; PLL Divide data
	FREQ_WK_L	EQU		63H			; Work area for calculation
	FREQ_WK_H	EQU		64H			; Work area for calculation
	FREQ_REM_L	EQU		65H			; PLL/DDS remainder value low byte
	FREQ_REM_H	EQU		66H			; PLL/DDS remainder value low byte
	PLL_LOW2	EQU		67H			; PLL low byte working area	
	DDSP_3W_L	EQU		68H			; Low byte of PLL DDS Higher data
	DDSP_3W_H	EQU		69H			; High byte of PLL DDS Higher data
	DIV100		EQU		6AH			; 100Hz decrement value for DDS
	STEP_RATE2	EQU		6BH			; Certain Step rate value

	VFO_A_BIN_L EQU		6CH			; VFO A Binary low byte
	VFO_A_BIN_H EQU		6DH			; VFO A Birary high byte
	VFO_B_BIN_L EQU		6EH			; VFO B Binary low byte
	VFO_B_BIN_H EQU		6FH			; VFO B Birary high byte
	VFO_PRE_SEL EQU		70H			; Previous selected VFO

	MEM_CH		EQU		71H			; Memory channel data
	BLINK		EQU		72H			; Charater blink timing flag
	TIM1_CONT	EQU		73H			; Counter of Timer1 count-up number 
	WR_PHASE	EQU		74H			; Memory Writing phase number
	CMFA_Flag	EQU		75H			; CMFA (CW Mode Frequency Adjustment) flag

	CH1_BIN_L	EQU		0A0H		; Memory Channel 1 BIN_L
	CH1_BIN_H	EQU		0A1H		; Memory Channel 1 BIN_H
	CH1_MD		EQU		0A2H		; Memory Channel 1 Mode
	CH2_BIN_L	EQU		0A3H		; Memory Channel 2 BIN_L
	CH2_BIN_H	EQU		0A4H		; Memory Channel 2 BIN_H
	CH2_MD		EQU		0A5H		; Memory Channel 2 Mode
	CH3_BIN_L	EQU		0A6H		; Memory Channel 3 BIN_L
	CH3_BIN_H	EQU		0A7H		; Memory Channel 3 BIN_H
	CH3_MD		EQU		0A8H		; Memory Channel 3 Mode
	CH4_BIN_L	EQU		0A9H		; Memory Channel 4 BIN_L
	CH4_BIN_H	EQU		0AAH		; Memory Channel 4 BIN_H
	CH4_MD		EQU		0ABH		; Memory Channel 4 Mode
	CH5_BIN_L	EQU		0ACH		; Memory Channel 5 BIN_L
	CH5_BIN_H	EQU		0ADH		; Memory Channel 5 BIN_H
	CH5_MD		EQU		0AEH		; Memory Channel 5 Mode
	CH6_BIN_L	EQU		0AFH		; Memory Channel 6 BIN_L
	CH6_BIN_H	EQU		0B0H		; Memory Channel 6 BIN_H
	CH6_MD		EQU		0B1H		; Memory Channel 6 Mode
	CH7_BIN_L	EQU		0B2H		; Memory Channel 7 BIN_L
	CH7_BIN_H	EQU		0B3H		; Memory Channel 7 BIN_H
	CH7_MD		EQU		0B4H		; Memory Channel 7 Mode
	CH8_BIN_L	EQU		0B5H		; Memory Channel 8 BIN_L
	CH8_BIN_H	EQU		0B6H		; Memory Channel 8 BIN_H
	CH8_MD		EQU		0B7H		; Memory Channel 8 Mode
	CH9_BIN_L	EQU		0B8H		; Memory Channel 9 BIN_L
	CH9_BIN_H	EQU		0B9H		; Memory Channel 9 BIN_H
	CH9_MD		EQU		0BAH		; Memory Channel 9 Mode	

	EE_ADDR		EQU		110H		; EEPROM Write address
	EE_DATA		EQU		111H		; EEPROM Write data


	       ORG 0H
		Goto    Main
;----------------- Main Routine ----------------------------
Main
		CALL	PORTINI			; Initialize for the ports
		CALL	SPIINI			; Initialize SPI communication registers

		BSF		PORTC,6			; Initialize "PERIOD" of TC9256P
		BSF		PORTC,7			; Initialize "CLK" of TC9256P
		BSF		PORTE,0			; Initialize "DATA" of TC9265P

		MOVLW	1H				; Initialize TIM1 count-up
		MOVWF	TIM1_CONT
		MOVWF	BLINK			; Initialize BLINK status

		MOVLW	01H				; Proceed to Write phase 1
		MOVWF	WR_PHASE		;
		
;		MOVLW	17H
;		MOVWF	BIN_H2
;		MOVLW	70H
;		MOVWF	BIN_L2


		BSF		PCLATH,3		; Select Page 1
		CALL	EEP_MODE		; Read Mode data from EEPROM
		CALL	EEP_STEP		; Read Step data from EEPROM
		CALL	EEP_FREQ_RD		; Read Frequency data from EEPROM
		CALL	EEP_VFO			; Read VFO channel data from EEPROM
		CALL	EEP_MEM_RD		; Read Memory data from EEPROM
		BCF		PCLATH,3		; Back to Page 0

;		CALL    BinTOBCD		; Convert to BCD
;		CALL	BCDtoASC		; BCD to ASCII
		
		CALL    LCD_ini			; Clear LCD Display


		CALL	MODE_DSP		; Display ' Mode XXXX'
		CALL	VFO_DSP			; Display ' VFO XXXX'
		CALL	STEP_DSP		; Display ' STEP XXXX'

		BSF		PCLATH,4		; Page 2
		CALL	MEMCH_DSP		; Display ' MEMORY CH XX '
		BCF		PCLATH,4		; Page 0

		CALL    BinTOBCD		; Convert to BCD
		CALL	BCDtoASC		; BCD to ASCII

		MOVLW	02H				; When startup, always "REC"
		MOVWF	TRS_SEL			; Store data
		MOVLW	03H				; CMFA_Flag Clear
		MOVWF	CMFA_Flag		;	
		CALL	TRS_DSP			; Display 'REC'

	;	CALL	TIM1S			; Wait for stable of DSP circuit

		MOVLW	20H				;" " 
		MOVWF	D_POS1			;
		BSF		PCLATH,3		; Bank1
		CALL	POS1			; Large Degit Position 1
		BCF		PCLATH,3		; Bank0
			
		MOVLW	35H				; "5"
		MOVWF	D_POS2			;
		BSF		PCLATH,3		; Bank1
		CALL	POS2			; Large Degit Position 1
		BCF		PCLATH,3		; Bank0
	
		MOVLW	30H				; "0"
		MOVWF	D_POS3			;
	
		BSF		PCLATH,3		; Bank1
		CALL	POS3			; Large Degit Position 1
		CALL	POS4			; Large Degit Position 1
		CALL	POS5			; Large Degit Position 1
		CALL	POS6			; Large Degit Position 1	
		CALL	POS7
		BCF		PCLATH,3		; Bank0

		MOVLW	20H				; " "
		MOVWF	D_POS8			;
		BSF		PCLATH,3		; Bank 1
		CALL	POS8			; Large Degit Position 1
		BCF		PCLATH,3		; Bank 0

		CALL    DP_DSP			; Display Decimal points

		MOVLW	3FH				; Display ON
		MOVWF	DP_DATA
		CALL	DISP_COM_WR1
		MOVLW	3FH
		MOVWF	DP_DATA
		CALL	DISP_COM_WR2

;--------------------- PLL/DDS Initialize ----------------------------
		; PLL DDS test =4.500MHz
		MOVLW	80H				; DDS for PLL lower initila data set
		MOVWF	DDSP_2W_L
		MOVLW	41H				; DDS for PLL initial data set
		MOVWF	DDSP_2W_H
		MOVLW	80H				
		MOVWF	DDSP_3W_L
		MOVLW	69H
		MOVWF	DDSP_3W_H

		CALL	DDSP_WR			; DDS for PLL reference
	
		; PLL Data set
		MOVLW	B'11010010'		; Set address = D2H
		MOVWF	PLL_ADR			; 
		MOVLW	B'00000000'
		MOVWF	PLL_LOW		
		MOVWF	PLL_LOW2		; Bit0-7 set
		MOVLW	B'00000000'
		MOVWF	PLL_MID			; Bit15-8 set
		MOVLW	B'00000000'
		MOVWF	PLL_HIG			; Bit15-8 set

		CALL	PLL_WR			; Data write

		MOVLW	B'11010000'		; Set address = D0H
		MOVWF	PLL_ADR			; 

;		MOVLW	B'00110000'		; In case that Ref is 10KHz
		MOVLW	B'01110000'		; In case that Ref is 50KHz
		MOVWF	PLL_LOW			; Bit0-7 set
		MOVWF	PLL_LOW2

;		MOVLW	B'00010001'		; In case that Ref is 50KHz
		MOVLW	B'00000011'		; In case that Ref is 50KHz
		MOVWF	PLL_MID			; Bit23-16 set

;		MOVLW	B'01011010'		; In case that Ref is 10KHz
		MOVLW	B'01011101'		; In case that Ref is 50KHz
		MOVWF	PLL_HIG			; Bit15-8 set

		CALL	PLL_WR			; Data write
		CALL	FREQ_UP
									
LOOP
		CALL	SPICOM
		GOTO	LOOP

;--------------- Frequency Change ---------------------
FREQ
		MOVF	MEM_CH,W		; Load Memory Channel
		SUBLW	0AH				; "VFO" ?
		BTFSC	STATUS,2		; 
		GOTO	FREQ5

		MOVF	WR_PHASE,W		; Load Memory writw phase
		SUBLW	02H				; "PHASE 2"?
		BTFSS	STATUS,2		
		RETURN			

FREQ5
		MOVFW	ENC_Mode
		SUBLW	10H				; "Up"?
		BTFSS	STATUS,2		
		GOTO	FREQ100

		MOVF	STEP_RATE2,W	; Load Step rate
		SUBLW	21H				; If step rate is 1KHz, go to FREQ20
		BTFSC	STATUS,2		
		GOTO	FREQ20

		MOVF	STEP_RATE2,W	; Load Step rate
		SUBLW	23H				; If step rate is 10KHz, go to FREQ30
		BTFSC	STATUS,2		
		GOTO	FREQ30
		
		MOVF	STEP_RATE2,W	; Load Step rate
		SUBLW	22H				; If Step rate is not 100Hz, goto out of loop
		BTFSC	STATUS,2
		GOTO	FREQ10

		GOTO	FREQ220			; If iregular character, go out of loop

FREQ10	 						; In case that Step = 100Hz
		INCFSZ	BIN_L2,1		; Increment
		GOTO	FREQ50
		INCF	BIN_H2,1
		GOTO	FREQ50	
	
FREQ20
		MOVLW	0AH				; Add 10 counts to low byte
		ADDWF	BIN_L2,1
		BTFSS	STATUS,0		; Carry up ?
		GOTO	FREQ50
		INCF	BIN_H2,1		; Increment high byte
		GOTO	FREQ50

FREQ30
		MOVLW	64H				; Add 10 counts to low byte
		ADDWF	BIN_L2,1
		BTFSS	STATUS,0		; Carry up ?
		GOTO	FREQ50
		INCF	BIN_H2,1		; Increment high byte
		GOTO	FREQ50
			
FREQ50
		MOVF	BIN_L2,W		; Compare "1B59"H as 50.700.1MHz
		SUBLW	59H
		BTFSC	STATUS,0		
		GOTO	FREQ200			; Not match "58"H
		MOVFW	BIN_H2			; HIgh byte
		SUBLW	1BH				
		BTFSS	STATUS,2		
		GOTO	FREQ200
		GOTO	FREQ150			; Reach the end of frequency. 		

FREQ100
		MOVFW	ENC_Mode
		SUBLW	11H				; "Down"?
		BTFSS	STATUS,2		
		GOTO	FREQ220			; Invalid data

		MOVF	STEP_RATE2,W	; Load Step rate
		SUBLW	21H				; If step rate is 1KHz, go to FREQ20
		BTFSC	STATUS,2		
		GOTO	FREQ120

		MOVF	STEP_RATE2,W	; Load Step rate
		SUBLW	23H				; If step rate is 1KHz, go to FREQ20
		BTFSC	STATUS,2		
		GOTO	FREQ130

		MOVF	STEP_RATE2,W	; Load Step rate
		SUBLW	22H				; If Step rate is not 100Hz, goto out of loop
		BTFSC	STATUS,2
		GOTO	FREQ110

		GOTO	FREQ220			; If iregular character, go out of loop

FREQ110							; In case that step = 100Hz
		DECF	BIN_L2,1		; Decrement
		MOVF	BIN_L2,W				
		SUBLW	H'FF'			; If 'FF' then decrement upper degit
		BTFSS	STATUS,2
		GOTO	FREQ200
		DECF	BIN_H2,1		; Decrement upper degit
		MOVF	BIN_H2,W 
		GOTO	FREQ140

FREQ120
		MOVLW	0AH				; Add 10 counts to low byte
		SUBWF	BIN_L2,1
		BTFSC	STATUS,0		; Carry up ?
		GOTO	FREQ200
		DECF	BIN_H2,1		; Increment high byte
		MOVF	BIN_H2,W
		GOTO	FREQ140

FREQ130
		MOVLW	64H				; Add 10 counts to low byte
		SUBWF	BIN_L2,1
		BTFSC	STATUS,0		; Carry up ?
		GOTO	FREQ200
		DECF	BIN_H2,1		; Increment high byte
		MOVF	BIN_H2,W
		GOTO	FREQ140

FREQ140
		SUBLW	0FFH			; Under 50.000.0MHz ?
		BTFSS	STATUS,2		
		GOTO	FREQ200			; Not reach the end of freq
FREQ150		
		MOVLW	00H				; Clear Freq data
		MOVWF	BIN_L2
		MOVWF	BIN_H2					
  
FREQ200
		BSF		PCLATH,3		; Bank1
		CALL	EEP_FREQ_WR		; Write freq data to EEPROM
		BCF		PCLATH,3		; Bank0

		CLRF	ENC_Mode		; Clear Encorder status
		CALL	FREQ_UP			; PLL/DDS Control
		CALL    BinTOBCD		; Convert to BCD
		CALL	BCDtoASC		; BCD to ASCII

		BSF		PCLATH,3		; Select bank1
		CALL	POS1			; Dispplay refresh
		CALL	POS2
		CALL	POS3
		CALL	POS4
		CALL	POS5
		CALL	POS6
		CALL	POS7
		CALL	POS8
		BCF		PCLATH,3		; Select bank1
FREQ220
		CALL	FREQ_STORE
		RETURN
;--------- Frequency data store to VFO/A, B base address --------
FREQ_STORE
		MOVF	VFO_SEL,W		; "VFO Channel" status data fetch
		SUBLW	01H				; compare to "VFO= A"
		BTFSS	STATUS,2		; If not 01, goto check "XXX"?
		GOTO	FREQ_STORE_10

		MOVFW	BIN_L2			; Store current data to VFO A Base
		MOVWF	VFO_A_BIN_L
		MOVFW	BIN_H2
		MOVWF	VFO_A_BIN_H

		GOTO	FREQ_STORE_END

FREQ_STORE_10
		MOVF	VFO_SEL,W		; "VFO Channel" status data fetch
		SUBLW	02H				; compare to "VFO= A"
		BTFSS	STATUS,2		; If not 01, goto check "XXX"?
		GOTO	FREQ_STORE_20	
	
		MOVFW	BIN_L2			; Store current data to VFO B Base
		MOVWF	VFO_B_BIN_L
		MOVFW	BIN_H2
		MOVWF	VFO_B_BIN_H

		GOTO	FREQ_STORE_END

FREQ_STORE_20
		MOVF	VFO_SEL,W		; "VFO Channel" status data fetch
		SUBLW	03H				; compare to "VFO= A"
		BTFSS	STATUS,2		; If not 01, goto check "XXX"?
		GOTO	FREQ_STORE_END

		MOVFW	BIN_L2			; Store current data to VFO B Base
		MOVWF	VFO_A_BIN_L
		MOVFW	BIN_H2
		MOVWF	VFO_A_BIN_H
	
FREQ_STORE_END
		RETURN

;--------- If 100Hz is stepede/down, how many value will be subtracted from data ?
Dec_Rate
		MOVLW	0D5H			; Between 0-399KHz, value is "D5"
		MOVWF	DIV100			;

		MOVF	BIN_H2,W		; Load high byte of Freq data
		SUBLW	10H				; Check <=10XXH ?
		BTFSC	STATUS,0		; Carry ?
		GOTO	Dec_Rate10

		MOVLW	0D3H			; Between 400-700KHz, Value is "D4"
		MOVWF	DIV100			
Dec_Rate10
		RETURN

;----------- Adjustment Frequency display ---------------
FREQ_ADJ
		MOVF	Mode,W			; "Mode" status data fetch
		SUBLW	01H				; compare to "CW"=01H
		BTFSS	STATUS,2		; If not 01, goto check "XXX"?
		GOTO	FREQ_ADJ10

		MOVLW	12H				; Add 23 counts to low byte
		ADDWF	FREQ_WK_L
		BTFSS	STATUS,0		; Carry up ?
		GOTO	FREQ_ADJ30
		INCF	FREQ_WK_H,1		; Decrement high byte
		GOTO	FREQ_ADJ30		; Return

FREQ_ADJ10
		MOVF	Mode,W			; "Mode" status data fetch
		SUBLW	02H				; compare to "SSB"=02H
		BTFSS	STATUS,2		; If not 01, goto check "XXX"?
		GOTO	FREQ_ADJ20

		MOVLW	1FH				; Add 30+1 counts to low byte
		ADDWF	FREQ_WK_L
		BTFSS	STATUS,0		; Carry up ?
		GOTO	FREQ_ADJ30
		INCF	FREQ_WK_H,1		; Decrement high byte
		GOTO	FREQ_ADJ30		; Return

FREQ_ADJ20
		MOVF	Mode,W			; "Mode" status data fetch
		SUBLW	03H				; compare to "AM"=03H
		BTFSS	STATUS,2		; If not 01, goto check "XXX"?
		GOTO	FREQ_ADJ30

		MOVLW	1FH				; Add 30+1 counts to low byte
		ADDWF	FREQ_WK_L
		BTFSS	STATUS,0		; Carry up ?
		GOTO	FREQ_ADJ30
		INCF	FREQ_WK_H,1		; Decrement high byte

FREQ_ADJ30
		RETURN
  
;--------------- Frequency Control ------------------
FREQ_UP
		CALL	Dec_Rate		; Decrement value decision

		CLRF	FREQ_PLL_AD		; Clear PLL Divide data
		MOVLW	00H
		MOVWF	FREQ_REM_L		; Clear DDS remainder data
		MOVWF	FREQ_REM_H		;
			
		MOVFW	BIN_H2			; Load Freq data to work area
		MOVWF	FREQ_WK_H
		MOVFW	BIN_L2			
		MOVWF	FREQ_WK_L

		CALL    FREQ_ADJ		; Frequency display adjustment

		MOVF	FREQ_WK_H,0		; High=0 ?
		BTFSC	STATUS,2		
		GOTO	FREQ_UP40		; If not goto loop
		
		SUBLW	01H				;
		BTFSS	STATUS,2
		GOTO	FREQ_UP50		; If high=0 or 1 then goto decrement loop 

		MOVF	FREQ_WK_L,0		; Low <= 1F4 ?
		SUBLW	0F4H			
		BTFSS	STATUS,0
		GOTO	FREQ_UP50

FREQ_UP40		
		MOVFW	FREQ_WK_L		; Store remainder value
		MOVWF	FREQ_REM_L		; Store DDS data with PLL devide
		MOVFW	FREQ_WK_H
		MOVWF	FREQ_REM_H
		GOTO	FREQ_UP110		; Goto DDS data prosessing 

FREQ_UP50
		MOVLW	0F4H			; Calculation of PLL divide count
		SUBWF	FREQ_WK_L,1		; Subtract "1F4H"=50.0KHz from Freq data
		BTFSC	STATUS,2		; Check Zero flag
		GOTO	FREQ_UP70
		BTFSS	STATUS, 0		; Check Carry flag
		GOTO	FREQ_UP60

		MOVF	FREQ_WK_H,0		; Check Data<1F4H(500)
		SUBLW	01H				
		BTFSS	STATUS,2
		GOTO	FREQ_UP55
		
		MOVFW	FREQ_WK_L		; Store remainder value
		MOVWF	FREQ_REM_L		; 
		MOVLW	00H				; Test 01 -> 00H
		MOVWF	FREQ_REM_H		;
		GOTO	FREQ_UP100

FREQ_UP55
		DECF	FREQ_WK_H,1		;
		GOTO	FREQ_UP80
		
FREQ_UP60
		DECF	FREQ_WK_H,1		; If Low data < F4 then decrement high data
		BTFSS	STATUS,2		; High <  0 ?
		GOTO	FREQ_UP70
		GOTO	FREQ_UP110

FREQ_UP70
		MOVF	FREQ_WK_H,0		; Check Data<1F4H(500)
		SUBLW	01H				
		BTFSS	STATUS,2
		GOTO	FREQ_UP75

		MOVFW	FREQ_WK_L		; Store remainder value
		MOVWF	FREQ_REM_L		; 
		
FREQ_UP75		
		DECF	FREQ_WK_H,1		;
 		BTFSS	STATUS,2		; High <  0 ?
		GOTO	FREQ_UP80
		GOTO	FREQ_UP100

FREQ_UP80		
		INCF	FREQ_PLL_AD,1	; Increment PLL Divide data	

		MOVF	FREQ_WK_H,0		; Check Data<1F4H(500)
		SUBLW	01H				
		BTFSS	STATUS,2
		GOTO	FREQ_UP85

		MOVFW	FREQ_WK_L		; Store remainder value
		MOVWF	FREQ_REM_L		;
		MOVLW	01H
		MOVWF	FREQ_REM_H

FREQ_UP85 
		GOTO	FREQ_UP50		;
FREQ_UP100
		INCF	FREQ_PLL_AD,1	; Increment PLL Divide data	
FREQ_UP110
		MOVF	FREQ_WK_H,1
		BTFSS	STATUS,2		; FREQ_WK_H = 0 ?
		GOTO	FREQ_UP115		; 
		MOVF	FREQ_WK_L,1
		BTFSS	STATUS,2		; FREQ_WK_L = 0 ?
		GOTO	FREQ_UP115		; 

		MOVLW	00H				; Clear FREQ_REM_H
		MOVWF	FREQ_REM_H
		
FREQ_UP115		
		CALL	PLL_DATA_CHG	; Change PLL Divide data

        ;------ Make DDS data --------

		MOVLW	3FH				; Clear bit6,7 for each high byte
		ANDWF	DDSP_2W_H
;		ANDWF	DDSP_3W_H
		
FREQ_UP120
		MOVFW	DIV100			; Load decrement value
		SUBWF	DDSP_2W_L		; DDSP_2W_L = DDSP_2W_L - CDH
		BTFSC	STATUS,0  		; Borrow 2W_H	
		GOTO	FREQ_UP130	; If not, goto continue

		MOVLW	01H				; Decrement value
		SUBWF	DDSP_2W_H,1		; If needs borrowing, decrement high byte
		BTFSC	STATUS,0		; Decremnet high byte of Low word data
		GOTO	FREQ_UP130

		MOVLW	3FH				; Clear bit6/7
		ANDWF	DDSP_2W_H

		DECF	DDSP_3W_L,1		; If needs borrowing, decrement Low byte of High Word

FREQ_UP130
		MOVLW	01H				; Decrement value
		SUBWF	FREQ_REM_L,1	; Decrement remainder 
		BTFSC	STATUS,0		; Borrow ?
		GOTO	FREQ_UP120		; If not, continue looping
		
		MOVF	FREQ_REM_H,0	; Load remainder high byte
		BTFSC	STATUS,2		; high=0 ?
		GOTO	FREQ_UP140		; If high=0 then end up looping

		DECF	FREQ_REM_H,1	; Decrement remainder high byte
		GOTO	FREQ_UP120		; Goto Loop

FREQ_UP140
		BSF		DDSP_2W_H,6		; Set bit6 of high byte
		CALL	DDSP_WR			; Trasfer data to DDS

		MOVLW	80H				; DDS data is initilized to next process
		MOVWF	DDSP_2W_L
		MOVLW	41H				; 
		MOVWF	DDSP_2W_H
		MOVLW	80H				
		MOVWF	DDSP_3W_L
		MOVLW	69H
		MOVWF	DDSP_3W_H
		
		RETURN
;--------------- Change PLL Divide data -------------
PLL_DATA_CHG
		MOVLW	B'01110000'		; Compare current PLL data to new
		ADDWF	FREQ_PLL_AD,0
		SUBWF	PLL_LOW
		BTFSC	STATUS,2
		GOTO	PLL_DATA_CHG10

		MOVLW	B'11010000'		; Set address = D0H
		MOVWF	PLL_ADR			; 

		MOVLW	B'01110000'		; In case that Ref is 50KHz
		ADDWF	FREQ_PLL_AD,0
		MOVWF	PLL_LOW			; Bit0-7 set
		MOVWF	PLL_LOW2

		MOVLW	B'00000011'		; In case that Ref is 50KHz
		MOVWF	PLL_MID			; Bit23-16 set

		MOVLW	B'01011101'		; In case that Ref is 50KHz
		MOVWF	PLL_HIG			; Bit15-8 set

		CALL	PLL_WR			; Data write

PLL_DATA_CHG10
		RETURN

;--------------- PLL write --------------------------
PLL_WR	
		BCF		PORTC,6			; "PERIOD" goes low
		CALL	TIME5U			; Wait 5uS

	; For address byte (1/2)
		MOVLW	03H				; Loop counter set
		MOVWF	PLL_LPC
PLL_WR_10
		RRF		PLL_ADR			; LSB of Address will enter to Carry flag
		BTFSS	STATUS,0		; If carry=1(LSB is high) then goto 20
		GOTO	PLL_WR_20		; 
		BSF		PORTE,0			; Data=0
		GOTO	PLL_WR_30		; Goto write procedure 
PLL_WR_20
		BCF		PORTE,0			; Data=1
PLL_WR_30
		CALL	TIME5U			; Wait 5uS
		BCF		PORTC,7			; CLK goes Low
		CALL	TIME5U			; Wait 5uS
		BSF		PORTC,7			; CLK goes High
		DECFSZ	PLL_LPC			; Decrement loop counter
		GOTO	PLL_WR_10		; Loop

		CALL	TIME5U			; Wait 5uS
		BSF		PORTC,6			; "PERIOD" goes High

		; For address byte (2/2)

		MOVLW	05H				; Loop counter set
		MOVWF	PLL_LPC
PLL_WR_31
		RRF		PLL_ADR			; LSB of Address will enter to Carry flag
		BTFSS	STATUS,0		; If carry=1(LSB is high) then goto 20
		GOTO	PLL_WR_32		; 
		BSF		PORTE,0			; Data=0
		GOTO	PLL_WR_33		; Goto write procedure 
PLL_WR_32
		BCF		PORTE,0			; Data=1
PLL_WR_33
		CALL	TIME5U			; Wait 5uS
		BCF		PORTC,7			; CLK goes Low
		CALL	TIME5U			; Wait 5uS
		BSF		PORTC,7			; CLK goes High
		DECFSZ	PLL_LPC			; Decrement loop counter
		GOTO	PLL_WR_31		; Loop

	; For Low byte
PLL_WR_40
		MOVLW	08H				; Loop counter set
		MOVWF	PLL_LPC
PLL_WR_50
		RRF		PLL_LOW2		; LSB of LOW word will enter to Carry flag
		BTFSS	STATUS,0		; If carry=1(LSB is high) then goto 20
		GOTO	PLL_WR_60		;
		BSF		PORTE,0			; Data=0
		GOTO	PLL_WR_70		; Goto write procedure 
PLL_WR_60
		BCF		PORTE,0			; Data=1
PLL_WR_70
		CALL	TIME5U			; Wait 5uS
		BCF		PORTC,7			; CLK goes Low
		CALL	TIME5U			; Wait 5uS
		BSF		PORTC,7			; CLK goes High
		DECFSZ	PLL_LPC			; Decrement loop counter
		GOTO	PLL_WR_50		; Loop

		; For middle byte
PLL_WR_80
		MOVLW	08H				; Loop counter set
		MOVWF	PLL_LPC

PLL_WR_90
		RRF		PLL_MID			; LSB of Low word will enter to Carry flag
		BTFSS	STATUS,0		; If carry=1(LSB is high) then goto 20
		GOTO	PLL_WR_100		;
		BSF		PORTE,0			; Data=0
		GOTO	PLL_WR_110		; Goto write procedure 
PLL_WR_100
		BCF		PORTE,0			; Data=1
PLL_WR_110
		CALL	TIME5U			; Wait 5uS
		BCF		PORTC,7			; CLK goes Low
		CALL	TIME5U			; Wait 5uS
		BSF		PORTC,7			; CLK goes High
		DECFSZ	PLL_LPC			; Decrement loop counter
		GOTO	PLL_WR_90		; Loop

		; For High byte
PLL_WR_120
		MOVLW	08H				; Loop counter set
		MOVWF	PLL_LPC
PLL_WR_130
		RRF		PLL_HIG			; LSB of Low word will enter to Carry flag
		BTFSS	STATUS,0		; If carry=1(LSB is high) then goto 20
		GOTO	PLL_WR_140		;
		BSF		PORTE,0			; Data=0
		GOTO	PLL_WR_150		; Goto write procedure 
PLL_WR_140
		BCF		PORTE,0			; Data=1
PLL_WR_150
		CALL	TIME5U			; Wait 5uS
		BCF		PORTC,7			; CLK goes Low
		CALL	TIME5U			; Wait 5uS
		BSF		PORTC,7			; CLK goes High
		DECFSZ	PLL_LPC			; Decrement loop counter
		GOTO	PLL_WR_130		; Loop

	; Latch signal
		CALL	TIME5U			; Wait 5uS
		BCF		PORTC,6			; "PERIOD" goes low
		CALL	TIME5U			; Wait 5uS
		BSF		PORTC,6			; "PERIOD" goes high
		CALL	TIME5U			; Wait 5uS

		RETURN
;--------------- PLL reference DDS Write ------------
DDSP_WR
		MOVLW	28H				; Control Data 2028H set
		MOVWF	DDSP_DT_L
		MOVLW	20H
		MOVWF	DDSP_DT_H		
		CALL	DDS_PLL			; Write 1st word

		MOVF	DDSP_2W_L,W		; Read Lower data 
		MOVWF	DDSP_DT_L

		MOVF	DDSP_2W_H,W		; Read highr data
		MOVWF	DDSP_DT_H		
		CALL	DDS_PLL			; Write 2nd word

;		MOVLW	7FH				; Lower data 6980H set 6980 4180 =4500KHz
		MOVF	DDSP_3W_L,W
		MOVWF	DDSP_DT_L
;		MOVLW	69H
		MOVF	DDSP_3W_H,W
		MOVWF	DDSP_DT_H
		CALL	DDS_PLL

		RETURN

;--------------- DDS PLL Accsee --------------------
DDS_PLL
        BSF		PORTC,2			; SCLK1　initialize
		BSF		PORTC,0			; FSYNC initialize
		CALL	TIME50U			; 50uS wait

		BCF		PORTC,0			; FSYNC active (goes L)
		CALL	TIME50U			; 50uS wait

		MOVLW	8H				; Loop Count set
		MOVWF	DDSP_CT

DDS_PLL_10
		BCF		STATUS,0		; Carry flag clear
		RLF		DDSP_DT_H,1		; Move LSB to C flag
		BTFSS	STATUS,0		; If C is clear, skip the next instruction
		GOTO	DDS_PLL_20

		BSF		PORTC,1			; DDS data is '1'
		GOTO	DDS_PLL_30
DDS_PLL_20
		BCF		PORTC,1			; DDS data is '0'
DDS_PLL_30		
		CALL	TIME50U			; 50uS wait
		BCF		PORTC,2			; Falls CLK
		CALL	TIME50U			; 50uS wait
		BSF		PORTC,2			; Rise CLK
		CALL	TIME50U			; 50uS wait

		DECFSZ	DDSP_CT,1		; Loop
		GOTO	DDS_PLL_10

;        (High Byte)
		MOVLW	8H				; Loop Count set
		MOVWF	DDSP_CT

DDS_PLL_40
		BCF		STATUS,0		; Carry flag clear
		RLF		DDSP_DT_L,1		; Move LSB to C flag
		BTFSS	STATUS,0		; If C is clear, skip the next instruction
		GOTO	DDS_PLL_50

		BSF		PORTC,1			; DDS data is '1'
		GOTO	DDS_PLL_60
DDS_PLL_50
		BCF		PORTC,1			; DDS data is '0'
DDS_PLL_60		
		CALL	TIME50U			; 50uS wait
		BCF		PORTC,2			; Falls CLK
		CALL	TIME50U			; 50uS wait
		BSF		PORTC,2			; Rise CLK
		CALL	TIME50U			; 50uS wait


		DECFSZ	DDSP_CT,1		; Loop
		GOTO	DDS_PLL_40

		BSF		PORTC,0			; FSYNC inactive (goes H)
		CALL	TIME50U			; 50uS wait

		RETURN

; -------------- Exchange Binary to BCD ---------------
BinTOBCD:

		MOVF	BIN_L2,W
		MOVWF	BIN_L

		MOVF	BIN_H2,W
		MOVWF	BIN_H

		BCF		STATUS,0	;Clear Carry bit
		MOVLW	.16
		MOVWF	Count
		CLRF	R0
		CLRF	R1
		CLRF	R2
Loop16
		RLF		BIN_L,F
		RLF		BIN_H,F

		RLF		R2,F
		RLF		R1,F
		RLF		R0,F

		DECFSZ	Count,F
		GOTO	adjDEC
    	RETLW	0
adjDEC
		MOVLW	R2
		MOVWF	FSR
		CALL	adjBCD	
		
		MOVLW	R1
		MOVWF	FSR
		CALL	adjBCD

		MOVLW	R0
		MOVWF	FSR
		CALL	adjBCD

		GOTO	Loop16

adjBCD
		MOVLW	3
		ADDWF	0,W
		MOVWF	Temp1
		BTFSC	Temp1,3		; test if result >7
		MOVWF	0
		MOVLW	30
		ADDWF	0,W
		MOVWF	Temp1
		BTFSC	Temp1,7		; Test if result >7
		MOVWF	0			; Save As MSD
		RETLW	0	
;-------------------- < BCD data to ASCII >------------------------
BCDtoASC:
d1_writebcd:
      movf  R1,W            	          ; Fetch 
      swapf  R1,W                        ; swap nibbles
      andlw  0x0f                        ; clear bits 4-7
      addlw  0x06                        ; add 6
      btfss  STATUS,DC                   ; if a-f, DC=1
      goto   d1_lessnine                 ; if DC=0, < 9, so goto lessnine
      addlw  0x31                        ; add 31h to make ascii
      goto   d1_save_asc1                ; skip to output
d1_lessnine:
      addlw  0x2a   
d1_save_asc1:                            ; add offset for 0-9 to make ascii
	  movwf	 D_POS4

      movf   R1,W                        ; restore W
      andlw  0x0f                        ; clear bits 4-7
      addlw  0x06                        ; add 6
      btfss  STATUS,DC                   ; if a-f, DC=1
      goto   d1_lessnine2                ; if DC=0, < 9, so goto lessnine
      addlw  0x31                        ; add 31h to make ascii
      goto   d1_save_asc2                ; skip to output
d1_lessnine2:
      addlw  0x2a                        ; add offset for 0-9 to
d1_save_asc2:
	  movwf	 D_POS5

d2_writebcd:
      movf  R2,W            	          ; Fetch 
      swapf  R2,W                        ; swap nibbles
      andlw  0x0f                        ; clear bits 4-7
      addlw  0x06                        ; add 6
      btfss  STATUS,DC                   ; if a-f, DC=1
      goto   d2_lessnine                 ; if DC=0, < 9, so goto lessnine
      addlw  0x31                        ; add 31h to make ascii
      goto   d2_save_asc3                ; skip to output
d2_lessnine:
      addlw  0x2a                        ; add offset for 0-9 to make ascii
d2_save_asc3:
	  movwf	 D_POS6

      movf   R2,W                        ; restore W
      andlw  0x0f                        ; clear bits 4-7
      addlw  0x06                        ; add 6
      btfss  STATUS,DC                   ; if a-f, DC=1
      goto   d2_lessnine2                ; if DC=0, < 9, so goto lessnine
      addlw  0x31                        ; add 31h to make ascii
      goto   d2_save_asc4                ; skip to output
d2_lessnine2:
      addlw  0x2a                        ; add offset for 0-9 to
d2_save_asc4:
	  movwf	 D_POS7

	  RETURN


;---------------- Display Decimal points -------------------
DP_DSP  ;---------------- Left Side -----------------------
		MOVLW	0BBH			; Page address
		MOVWF	DP_DATA
		CALL	DISP_COM_WR1

		MOVLW	0C0H			; Start Line
		MOVWF	DP_DATA
		MOVWF	Line
		CALL	DISP_COM_WR1

		MOVLW	6FH				; Column Address
		MOVWF	DP_DATA
		CALL	DISP_COM_WR1

		MOVLW	03H				;Decimal Point bit image
		MOVWF	DP_DATA
		CALL	DISP_DATA_WR1	
		CALL	DISP_DATA_WR1

       ;---------------- Right Side ------------------------

		MOVLW	0BBH			; Page address
		MOVWF	DP_DATA
		CALL	DISP_COM_WR2

		MOVLW	0C0H			; Start Line
		MOVWF	DP_DATA
		MOVWF	Line
		CALL	DISP_COM_WR2

		MOVLW	5FH				; Column Address
		MOVWF	DP_DATA
		CALL	DISP_COM_WR2

		MOVLW	03H				;Decimal Point bit image
		MOVWF	DP_DATA
		CALL	DISP_DATA_WR2	
		CALL	DISP_DATA_WR2

		RETURN

;---------------- Mode Display -----------------------------
MODE_DSP

		MOVLW	0BCH			; Page address
		MOVWF	DP_DATA
		CALL	DISP_COM_WR1

		MOVLW	0C0H			; Start Line
		MOVWF	DP_DATA
		MOVWF	Line
		CALL	DISP_COM_WR1

		MOVLW	40H				; Column Address
		MOVWF	DP_DATA
		CALL	DISP_COM_WR1

		MOVLW	20H				; [ ]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L	
		MOVLW	4DH				; [M]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L
		MOVLW	4FH				; [O]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L		
		MOVLW	44H				; [D]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L
		MOVLW	45H				; [E]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L		
		MOVLW	3DH				; [=]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L
MODE_DSP10
		MOVF	Mode,W			; "Mode" status data fetch
		SUBLW	01H				; compare to "CW"=01H
		BTFSS	STATUS,2		; If not 01, goto check "SSB"?
		GOTO	MODE_DSP_110

		MOVLW	43H				; [C]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L
		MOVLW	57H				; [W]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L		
		MOVLW	20H				; [ ]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L		
	
		GOTO	MODE_DSP_130	; Return

MODE_DSP_110
		MOVF	Mode,W			; "Mode" status data fetch
		SUBLW	02H				; compare to "SSB"=02H
		BTFSS	STATUS,2		; If not 01, goto check "XXX"?
		GOTO	MODE_DSP_120

		MOVLW	53H				; [S]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L
		MOVLW	53H				; [S]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L
		MOVLW	42H				; [B]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L

		GOTO	MODE_DSP_130	;  Return

MODE_DSP_120
		MOVF	Mode,W			; "Mode" status data fetch
		SUBLW	03H				; compare to "SSB"=02H
		BTFSS	STATUS,2		; If not 01, goto check "XXX"?
		GOTO	MODE_DSP_140	; Iregular character

		MOVLW	41H				; [A]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L
		MOVLW	4DH				; [M]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L		
		MOVLW	20H				; [ ]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L		
	
MODE_DSP_130
		MOVLW	50H				; Set "Mode" address in RAM to EEPROM writing
		BANKSEL	EEADR
		MOVWF	EE_ADDR	
		BANKSEL	PIR1		
		MOVF	Mode,W			; Set "Mode" address in RAM to EEPROM writing
		BANKSEL	EEDATA
		MOVWF	EE_DATA
		BSF		PCLATH,3		; Select Page 1
		CALL	EEP_WR
		BCF		PCLATH,3		; Back to Page 0
		BANKSEL	PIR1

MODE_DSP_140
		RETURN

;----------------- Display VFO CH ----------------------
VFO_DSP

		MOVLW	0BDH			; Page address
		MOVWF	DP_DATA
		CALL	DISP_COM_WR1

		MOVLW	0C0H			; Start Line
		MOVWF	DP_DATA
		MOVWF	Line
		CALL	DISP_COM_WR1

		MOVLW	40H				; Column Address
		MOVWF	DP_DATA
		CALL	DISP_COM_WR1

		MOVLW	20H				; [ ]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L	
		MOVLW	56H				; [V]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L
		MOVLW	47H				; [F]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L		
		MOVLW	4FH				; [O]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L
		MOVLW	3DH				; [=]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L

VFO_DISP_10	
		MOVF	VFO_SEL,W		; "VFO Channel" status data fetch
		SUBLW	01H				; compare to "VFO= A"
		BTFSS	STATUS,2		; If not 01, goto check "XXX"?
		GOTO	VFO_DISP_20

		MOVLW	20H				; Disp "VFO= A"
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L
		MOVLW	41H				; 
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L
		MOVLW	20H				;
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L
		MOVLW	20H				; 
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L

		MOVFW	VFO_A_BIN_L		; BIN_L2 <= VFO_A_BIN_L
		MOVWF	BIN_L2
		MOVFW	VFO_A_BIN_H		; BIN_H2 <= VFO_A_BIN_H
		MOVWF	BIN_H2
		
		GOTO	VFO_DISP_40
		
VFO_DISP_20
		MOVF	VFO_SEL,W		; "VFO Channel" status data fetch
		SUBLW	02H				; compare to "VFO= B"
		BTFSS	STATUS,2		; If not 01, goto check "XXX"?
		GOTO	VFO_DISP_30		; 

		MOVLW	20H				; Disp "VFO= B"
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L
		MOVLW	42H				; 
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L
		MOVLW	20H				;
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L
		MOVLW	20H				; 
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L

		MOVFW	VFO_B_BIN_L		; BIN_L2 <= VFO_B_BIN_L
		MOVWF	BIN_L2
		MOVFW	VFO_B_BIN_H		; BIN_H2 <= VFO_B_BIN_H
		MOVWF	BIN_H2

		GOTO	VFO_DISP_40

VFO_DISP_30
		MOVF	VFO_SEL,W		; "VFO Channel" status data fetch
		SUBLW	03H				; compare to "VFO= A(RX)/B(TX)"
		BTFSS	STATUS,2		; If not 01, goto check "XXX"?
		GOTO	VFO_DISP_END	; Iregular character

		MOVLW	20H				; Disp "VFO= A/B"
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L
		MOVLW	41H				; 
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L
		MOVLW	2FH				; Disp "VFO= A/B"
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L
		MOVLW	42H				; 
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L

		MOVFW	VFO_A_BIN_L		; BIN_L2 <= VFO_A_BIN_L
		MOVWF	BIN_L2
		MOVFW	VFO_A_BIN_H		; BIN_H2 <= VFO_A_BIN_H
		MOVWF	BIN_H2

VFO_DISP_40

		MOVLW	53H				; Set "Mode" address in RAM to EEPROM writing
		BANKSEL	EEADR
		MOVWF	EE_ADDR	
		BANKSEL	PIR1		
		MOVF	VFO_SEL,W		; Set "Mode" address in RAM to EEPROM writing
		BANKSEL	EEDATA
		MOVWF	EE_DATA
		BSF		PCLATH,3		; Select Page 1
		CALL	EEP_WR
		BCF		PCLATH,3		; Back to Page 0
		BANKSEL	PIR1
		
VFO_DISP_END
		CALL	VFO_SEL_Check	; 
		RETURN
;---------- Check Deferent VFO has been selected ? ---------------
VFO_SEL_Check
		MOVF	VFO_SEL,W		; Load previous data
		SUBWF	VFO_PRE_SEL,W	; Current VFO data
		BTFSC	STATUS,2		; 
		GOTO	VFO_SEL_Check_20  ; If PRE=CURRENT then return

		MOVF	VFO_SEL,W		; Load current data again
		MOVWF	VFO_PRE_SEL		; Write data to PRE
	
		CALL	FREQ_UP			; PLL/DDS Control
		CALL    BinTOBCD		; Convert to BCD
		CALL	BCDtoASC		; BCD to ASCII

		BSF		PCLATH,3		; Select bank1
		CALL	POS1			; Dispplay refresh
		CALL	POS2
		CALL	POS3
		CALL	POS4
		CALL	POS5
		CALL	POS6
		CALL	POS7
		CALL	POS8
		BCF		PCLATH,3		; Select bank1
VFO_SEL_Check_20
		RETURN
;---------------- Display ' STEP=' --------------------------
STEP_DSP

		MOVLW	0BEH			; Page address
		MOVWF	DP_DATA
		CALL	DISP_COM_WR1
		
		MOVLW	0C0H			; Start Line
		MOVWF	DP_DATA
		MOVWF	Line
		CALL	DISP_COM_WR1
	
		MOVLW	40H				; Column Address
		MOVWF	DP_DATA
		CALL	DISP_COM_WR1
		
		MOVLW	20H				; [ ]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L	
		MOVLW	53H				; [S]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L
		MOVLW	54H				; [T]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L		
		MOVLW	45H				; [E]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L
		MOVLW	50H				; [P]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L
		MOVLW	3DH				; [=]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L

		MOVF	STEP_RATE,W		; Load Step rate
		SUBLW	21H				; 1KHz
		BTFSC	STATUS,2		
		GOTO	STEP_DSP20

		MOVF	STEP_RATE,W		; Load Step rate
		SUBLW	22H				; 100Hz
		BTFSC	STATUS,2		
		GOTO	STEP_DSP10

		MOVF	STEP_RATE,W		; Load Step rate
		SUBLW	23H				; 10KHz
		BTFSC	STATUS,2		
		GOTO	STEP_DSP30

		GOTO	STEP_DSP50		; Iregurar caharacter ?

STEP_DSP10
		MOVLW	31H				; [1]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L		
		MOVLW	30H				; [0]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L
		MOVLW	30H				; [0]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L
		MOVLW	48H				; [H]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L

		MOVLW	22H				; Write "100Hz" to Certain step rate
		MOVWF	STEP_RATE2

		GOTO	STEP_DSP40		; Store data to EEPROM

STEP_DSP20
		MOVLW	31H				; [1]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L		
		MOVLW	4BH				; [K]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L
		MOVLW	20H				; [ ]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L
		MOVLW	20H				; [ ]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L
		MOVLW	20H				; [ ]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L

		MOVLW	21H				; Write "1KHz" to Certain step rate
		MOVWF	STEP_RATE2

		GOTO	STEP_DSP40		; Store data to EEPROM

STEP_DSP30
		MOVLW	31H				; [1]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L		
		MOVLW	30H				; [0]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L
		MOVLW	4BH				; [K]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L
		MOVLW	20H				; [ ]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L
		MOVLW	20H				; [ ]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_L

		MOVLW	23H				; Write "10KHz" to Certain step rate
		MOVWF	STEP_RATE2

STEP_DSP40
		MOVLW	52H				; Set "Step" address in RAM to EEPROM writing
		BANKSEL	EEADR
		MOVWF	EE_ADDR	
		BANKSEL	PIR1		
		MOVF	STEP_RATE2,W	; Set "Mode" address in RAM to EEPROM writing
		BANKSEL	EEDATA
		MOVWF	EE_DATA
		BSF		PCLATH,3		; Select Page 1
		CALL	EEP_WR
		BCF		PCLATH,3		; Back to Page 0
		BANKSEL	PIR1
STEP_DSP50		
		RETURN
;------------- Display Memory channel blank -------------------
MEMCH_BLK

		MOVLW	0BCH			; Page address
		MOVWF	DP_DATA
		CALL	DISP_COM_WR2

		MOVLW	0C0H			; Start Line
		MOVWF	DP_DATA
		MOVWF	Line
		CALL	DISP_COM_WR2

		MOVLW	40H				; Column Address
		MOVWF	DP_DATA
		CALL	DISP_COM_WR2

		MOVLW	4DH				; [M]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_R
		MOVLW	45H				; [E]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_R		
		MOVLW	4DH				; [M]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_R
		MOVLW	3DH				; [=]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_R

		MOVLW	20H				; [ ]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_R
		MOVLW	20H				; [ ]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_R		
		MOVLW	20H				; [ ]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_R

		RETURN

;-------------- Displat states Transmit or Receive ----------------
TRS_DSP
		MOVLW	0BEH			; Page address
		MOVWF	DP_DATA
		CALL	DISP_COM_WR2

		MOVLW	0C0H			; Start Line
		MOVWF	DP_DATA
		MOVWF	Line
		CALL	DISP_COM_WR2

		MOVLW	46H				; Column Address
		MOVWF	DP_DATA
		CALL	DISP_COM_WR2

		MOVF	TRS_SEL,W		; Load TRS/REC frag
		SUBLW	01H				; TX=01H ?
		BTFSS	STATUS,2		
		GOTO	TRS_DSP100

		MOVLW	54H				; [T]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_R
		MOVLW	52H				; [R]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_R		
		MOVLW	53H				; [S]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_R

		MOVF	VFO_SEL,W		; Check VFO status is A/B ?
		SUBLW	03H				
		BTFSS	STATUS,2	
		GOTO	TRS_DSP10		; If not=A/B then return

		MOVFW	VFO_B_BIN_L		; BIN_L2 <= VFO_B_BIN_L
		MOVWF	BIN_L2
		MOVFW	VFO_B_BIN_H		; BIN_H2 <= VFO_B_BIN_H
		MOVWF	BIN_H2
;-------------(20120624)--------------------------	
TRS_DSP10	
		MOVF	Mode,W			; If Mode=CW then Frequency will be increased 800Hz
		SUBLW	01H
		BTFSS	STATUS,2
		GOTO	TRS_DSP20		; Unless Mode is CW, skip adding 800Hz

		MOVF	CMFA_Flag,W		; Check CMFA condition
		SUBLW	02H				; If it is still ON, go through
		BTFSC	STATUS,2
		GOTO	TRS_DSP30

		CALL	Lim_Freq		; Check frequency limit
		SUBLW	02H				; If W= 2 then normal frequency and activate CMFA
		BTFSS	STATUS,2		; 
		GOTO	TRS_DSP30		; If Freq is closing the limit, go through CMFA

		MOVLW	02H				; CMFA_Flag ON
		MOVWF	CMFA_Flag

		MOVF	BIN_L2,W		; Add 8(800Hz)
		ADDLW	08H	
		BTFSS	STATUS,0
		GOTO	TRS_DSP15		; If no carry flag, 

		MOVWF	BIN_L2			; Store Freq low byte
		INCF	BIN_H2,1		; Increment Freq high byte 
		GOTO	TRS_DSP30

TRS_DSP15				
		MOVWF	BIN_L2			; Store Freq low byte
		GOTO	TRS_DSP30

TRS_DSP20
		MOVF	CMFA_Flag,W		; Check CMFA, if the flag is ON, clrear it and decrese 800Hz
		SUBLW	02H				
		BTFSS	STATUS,2	
		GOTO	TRS_DSP30		; CMFA is off, go through

		MOVLW	03H				; Make CMFA off
		MOVWF	CMFA_Flag

		MOVF	BIN_L2,W		; Decresing 800Hz in case that Mode is NOT cw and CFMA is on.
		SUBLW	08H	
		BTFSC	STATUS,0		; If carry off then skip high byte decrement
		GOTO    TRS_DSP30

		MOVWF	BIN_L2			; Store low byte
		DECF	BIN_H2,1		; Decrement high byte			
		
;---------------------------------------------------
TRS_DSP30		
		CALL	FREQ_UP			; PLL/DDS Control
		CALL    BinTOBCD		; Convert to BCD
		CALL	BCDtoASC		; BCD to ASCII

		BSF		PCLATH,3		; Select bank1
		CALL	POS1			; Dispplay refresh
		CALL	POS2
		CALL	POS3
		CALL	POS4
		CALL	POS5
		CALL	POS6
		CALL	POS7
		CALL	POS8
		BCF		PCLATH,3		; Select bank1

		GOTO	TRS_DSP220		; Return

;--------(20120624)-------------------------------
TRS_DSP100
		MOVF	Mode,W			; If Mode=CW then Frequency will be increased 800Hz
		SUBLW	01H
		BTFSS	STATUS,2
		GOTO	TRS_DSP120		; Unless Mode is CW, skip adding 800Hz

		MOVF	CMFA_Flag,W		; Check CMFA condition
		SUBLW	02H		
		BTFSS	STATUS,2
		GOTO	TRS_DSP130		; Go through if CMFA is off (Receiving)

		MOVLW	03H				; CMFA_Flag OFF
		MOVWF	CMFA_Flag

		MOVLW	08H				; Subtract 8(800Hz)
		SUBWF	BIN_L2	
		BTFSC	STATUS,0
		GOTO	TRS_DSP130		; If no carry flag, 

		DECF	BIN_H2,1		; Increment Freq high byte 
		GOTO	TRS_DSP130

TRS_DSP120
		MOVF	CMFA_Flag,W		; Check CMFA, if the flag is ON, clrear it and decrese 800Hz
		SUBLW	02H				
		BTFSS	STATUS,2	
		GOTO	TRS_DSP130		; CMFA is off, go through

		MOVLW	03H				; Make CMFA off
		MOVWF	CMFA_Flag

		MOVF	BIN_L2,W		; Decresing 800Hz in case that Mode is NOT cw and CFMA is on.
		SUBLW	08H	
		BTFSC	STATUS,0		; If carry off then skip high byte decrement
		GOTO    TRS_DSP130

		MOVWF	BIN_L2			; Store low byte
		DECF	BIN_H2,1		; Decrement high byte
;------------------------------------------------------------------------------
TRS_DSP130	
		MOVLW	52H				; [R]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_R
		MOVLW	45H				; [E]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_R		
		MOVLW	43H				; [C]
		MOVWF	LCD_CHR
		CALL	LCD_CHR_WR_R

		MOVF	VFO_SEL,W		; Check VFO status is A/B ?
		SUBLW	03H				
		BTFSS	STATUS,2	
		GOTO	TRS_DSP220		; If not=A/B then return

		MOVFW	VFO_A_BIN_L		; BIN_L2 <= VFO_A_BIN_L
		MOVWF	BIN_L2
		MOVFW	VFO_A_BIN_H		; BIN_H2 <= VFO_A_BIN_H
		MOVWF	BIN_H2



		CALL	FREQ_UP			; PLL/DDS Control
		CALL    BinTOBCD		; Convert to BCD
		CALL	BCDtoASC		; BCD to ASCII

		BSF		PCLATH,3		; Select bank1
		CALL	POS1			; Dispplay refresh
		CALL	POS2
		CALL	POS3
		CALL	POS4
		CALL	POS5
		CALL	POS6
		CALL	POS7
		CALL	POS8
		BCF		PCLATH,3		; Select bank1

TRS_DSP220
		RETURN

;------ Eliminate over/under limitation of Frequency ----------
Lim_Freq
		MOVLW	1BH				; Check freq higher byte is over limit, or not.
		SUBWF	BIN_H2,W		; 1BH - (BIN_H2) -> W
		BTFSS	STATUS,0		
		GOTO	Lim_Freq10
		BTFSS	STATUS,2		; BIN_H2 is 1BH ?
		GOTO	Lim_Freq10

		MOVLW	50H				; Check freq lower byte is over limit.	
		SUBWF	BIN_L2,W		; 50H - (BIN_L2) -> W
		BTFSS	STATUS,0
		GOTO	Lim_Freq10

		RETLW	1				; Frequency is closing to the overlimit

Lim_Freq10
		MOVLW	0H				; Check freq higher byte is under limit, or not.
		SUBWF	BIN_H2,W		; 0H - (BIN_H2) -> W
		BTFSS	STATUS,2
		GOTO	Lim_Freq20

		MOVLW	08H				; Check freq lower byte is under limit, or not.
		SUBWF	BIN_L2,W		; 8H - (BIN_L2) -> W
		BTFSS	STATUS,0
		
		RETLW   1				; Frequency is closing to the underlimit

Lim_Freq20
		RETLW	2				; Frequency must be normal

;------ Frequency chenge after memory channel change ----------
Freq_Change
		CALL    BinTOBCD		; Convert to BCD
		CALL	BCDtoASC		; BCD to ASCII
		CALL	FREQ_UP
		
		BSF		PCLATH,3		; Select bank1
		CALL	POS1			; Large Degit Position 1
		CALL	POS2			; Large Degit Position 2
		CALL	POS3			; Large Degit Position 3
		CALL	POS4			; Large Degit Position 4
		CALL	POS5			; Large Degit Position 5
		CALL	POS6			; Large Degit Position 6	
		CALL	POS7			; Large Degit Position 7
		BCF		PCLATH,3		; Select bank1

		RETURN
;------------- 1 character data write for left side -----------
LCD_CHR_WR_L

		MOVLW	6H				; 1 character
		MOVWF	LOOP_P1
		
		MOVLW	0H				; DATA
		MOVWF	LOOP_P2
Loop10_L
		BSF		PCLATH,3		; Move to Page 1
        CALL	LCD_DATA_SELECT	
		BCF		PCLATH,3		; Back to Page 0	

        CALL	DISP_DATA_WR1
        INCF	LOOP_P2
		DECFSZ	LOOP_P1
		GOTO	Loop10_L

		RETURN
;-------- 1st segment of Large Degit write for left side ---------------
BIG_CHR_WR_L_S1

		MOVLW	10H				; 1 character
		MOVWF	LOOP_P3
		
		MOVLW	0H				; DATA
		MOVWF	LOOP_P4

BIG_CHR_WR_L_S1_10
		BSF		PCLATH,3		; Move to Page 1
        CALL	BIG_DATA_SELECT	
		BCF		PCLATH,3		; Back to Page 0

        CALL	DISP_DATA_WR1
        INCF	LOOP_P4
		DECFSZ	LOOP_P3
		GOTO	BIG_CHR_WR_L_S1_10

		RETURN

;-------- 2nd segment of Large Degit write for left side ---------------
BIG_CHR_WR_L_S2

		MOVLW	10H				; 1 character
		MOVWF	LOOP_P3
		
		MOVLW	10H				; DATA
		MOVWF	LOOP_P4

BIG_CHR_WR_L_S2_10
		BSF		PCLATH,3		; Move to Page 1
        CALL	BIG_DATA_SELECT	
		BCF		PCLATH,3		; Back to Page 0

        CALL	DISP_DATA_WR1
        INCF	LOOP_P4
		DECFSZ	LOOP_P3
		GOTO	BIG_CHR_WR_L_S2_10

		RETURN

;-------- 3rd segment of Large Degit write for left side ---------------
BIG_CHR_WR_L_S3

		MOVLW	10H				; 1 character
		MOVWF	LOOP_P3
		
		MOVLW	20H				; DATA
		MOVWF	LOOP_P4

BIG_CHR_WR_L_S3_10
		BSF		PCLATH,3		; Move to Page 1
        CALL	BIG_DATA_SELECT	
		BCF		PCLATH,3		; Back to Page 0

        CALL	DISP_DATA_WR1
        INCF	LOOP_P4
		DECFSZ	LOOP_P3
		GOTO	BIG_CHR_WR_L_S3_10

		RETURN

;------------- one character write for right side-------------------------
LCD_CHR_WR_R

		MOVLW	6H				; 1 character
		MOVWF	LOOP_P1
		
		MOVLW	0H				; DATA
		MOVWF	LOOP_P2
Loop10_R
		BSF		PCLATH,3		; Mote to page 1
        CALL	LCD_DATA_SELECT	
		BCF		PCLATH,3		; Back to page 0	

        CALL	DISP_DATA_WR2
        INCF	LOOP_P2
		DECFSZ	LOOP_P1
		GOTO	Loop10_R

		RETURN

;---------------1st segment of Large Degit write for right side --------------
BIG_CHR_WR_R_S1

		MOVLW	10H				; 1 character
		MOVWF	LOOP_P3
		
		MOVLW	0H				; DATA
		MOVWF	LOOP_P4

BIG_CHR_WR_R_S1_10
		BSF		PCLATH,3		; Mote to page 1
        CALL	BIG_DATA_SELECT	
		BCF		PCLATH,3		; Back to page 0

        CALL	DISP_DATA_WR2
        INCF	LOOP_P4
		DECFSZ	LOOP_P3
		GOTO	BIG_CHR_WR_R_S1_10

		RETURN

;---------------2nd segment of Large Degit write for right side --------------
BIG_CHR_WR_R_S2

		MOVLW	10H				; 1 character
		MOVWF	LOOP_P3
		
		MOVLW	10H				; DATA
		MOVWF	LOOP_P4

BIG_CHR_WR_R_S2_10
		BSF		PCLATH,3		; Mote to page 1
        CALL	BIG_DATA_SELECT	
		BCF		PCLATH,3		; Back to page 0

        CALL	DISP_DATA_WR2
        INCF	LOOP_P4
		DECFSZ	LOOP_P3
		GOTO	BIG_CHR_WR_R_S2_10

		RETURN

;---------------3rd segment of Large Degit write for right side --------------
BIG_CHR_WR_R_S3

		MOVLW	10H				; 1 character
		MOVWF	LOOP_P3
		
		MOVLW	20H				; DATA
		MOVWF	LOOP_P4

BIG_CHR_WR_R_S3_10
		BSF		PCLATH,3		; Mote to page 
        CALL	BIG_DATA_SELECT
		BCF		PCLATH,3		; Back to page 0

        CALL	DISP_DATA_WR2
        INCF	LOOP_P4
		DECFSZ	LOOP_P3
		GOTO	BIG_CHR_WR_R_S3_10

		RETURN

;---------------- LCD Initialize ------------------------------
LCD_ini
		MOVLW	0B8H			; Page address
		MOVWF	DP_DATA	
		MOVLW	0B8H
		MOVWF	Page_Ad		
		CALL	DISP_COM_WR1
		MOVLW	0B8H
		MOVWF	DP_DATA	
		CALL	DISP_COM_WR2

		MOVLW	0C0H			; Start Line
		MOVWF	Line
		MOVWF	DP_DATA
		CALL	DISP_COM_WR1
		MOVLW	0C0H
		MOVWF	DP_DATA	
		CALL	DISP_COM_WR2

		MOVLW	40H				; Column Address
		MOVWF	DP_DATA
		CALL	DISP_COM_WR1
		MOVLW	40H
		MOVWF	DP_DATA	
		CALL	DISP_COM_WR2

	    MOVLW	8H				; Make 8 pages clear
		MOVWF	LOOP_P2
LCD_ini_5
		MOVLW	40H				; Make 40 columns clear
		MOVWF	LOOP_P1
LCD_ini_10
		MOVLW	0H				;  Clear RAM data
		MOVWF	DP_DATA
		CALL	DISP_DATA_WR1
		MOVLW	0H
		MOVWF	DP_DATA	
		CALL	DISP_DATA_WR2

		DECF	LOOP_P1			; Decrement the colums pointer
		BNZ		LCD_ini_10		; Loop

		INCF	Page_Ad,1		; Increment Page address
		MOVF	Page_Ad,0
		
		MOVWF	DP_DATA			
		CALL	DISP_COM_WR1

		MOVF	Page_Ad,0
		MOVWF	DP_DATA	
		CALL	DISP_COM_WR2

		MOVLW	8H				; Line address
		ADDWF	Line			; Line=Line+8
		MOVF	Line,W
	
		MOVWF	DP_DATA		
		CALL	DISP_COM_WR1

		MOVF	Line,W
		MOVWF	DP_DATA	
		CALL	DISP_COM_WR2

		DECF	LOOP_P2			; Decrement page pointer
		BNZ		LCD_ini_5

		RETURN

;---------------- Port Initialize -----------------------------
PORTINI							; Port A and B initialize
        BSF		STATUS,RP0
		BCF		INTCON,GIE

		MOVLW	b'10000000'
		MOVWF	OPTION_REG

		MOVLW	06H				; PortA pins are assigned all "Degital"
		MOVWF	ADCON1

		MOVLW	b'00000000'		; All of PORT A bits are Output
		MOVWF	TRISA
		MOVLW	b'00000000'		; All PortB bits are output
		MOVWF	TRISB
		MOVLW	b'00000000'		;
		MOVWF	TRISC
		MOVLW	b'00000000'		; 
		MOVWF	TRISD
		MOVLW	b'00000000'		; 
		MOVWF	TRISE

		BCF		STATUS,RP0
		RETURN
;---------- Initialize registers for SPI communication -----------
SPIINI
		BCF		SSPCON,3		; SSPM3-0:0101 SPI Slave SS disable
		BSF		SSPCON,2		;
		BCF		SSPCON,1		;
		BSF		SSPCON,0		;
		
		BANKSEL	SSPSTAT
		BCF		SSPSTAT, 7		; CMP=0
		BCF		SSPSTAT, 6		; CKE=0

		BANKSEL SSPCON
		BCF		SSPCON, 4		; CKP (Clock polarity)=0
		BSF		SSPCON, 5		; Enable SCK/SDO/SDI

		BANKSEL TRISC
		BSF		TRISC,	3		; PC3 is set with "Input" for Clock in
		BSF		TRISC,	4		; PC4 is set with "Input" for SDI
		BCF		TRISC,  5		; PC5 is set with "Output" for SDO

		BANKSEL SSPCON
		BCF		SSPCON, WCOL	; Collision detection bit clear
		BCF		SSPCON, SSPOV	; Receive overflow bit clear

		BANKSEL  SSPBUF
		LDLF 6,  SSPBUF

		RETURN

;----------- Communication by SPI --------------------------------
SPICOM
		BANKSEL	PIR1
		BTFSS	PIR1,SSPIF		; Flag check
		RETURN

		BANKSEL SSPBUF
		MOVFW	SSPBUF			; Get SPI receive data
		GOTO	SSP_DATA_CHK	; Data check
	
SPICOM10
		MOVF	FSR,W
		MOVWF	PORTA

SPICOM20
		RETURN


SSP_DATA_CHK
		SUBLW	50H				; Mode command ?
		BTFSS	STATUS,2		
		GOTO    SSP_DATA_CHK10 	; If not, go through
		CALL	SPICOM_DATA		; SPI Data receive
		CALL	MODE_DSP		; Mode info refresh
		GOTO	SPICOM10

SSP_DATA_CHK10	
		MOVFW	SSPBUF			; Get SPI receive data again
		SUBLW	51H				; Freq command ?
		BTFSS	STATUS,2
		GOTO	SSP_DATA_CHK20	; If not, go through
		CALL	SPICOM_DATA		; SPI Data receive
		CALL	FREQ			; Frequenecy info refresh
		GOTO	SPICOM10

SSP_DATA_CHK20
		MOVFW	SSPBUF			; Get SPI receive data again
		SUBLW	52H				; Step rate command ?
		BTFSS	STATUS,2
		GOTO	SSP_DATA_CHK30	; If not, go through
		CALL	SPICOM_DATA		; SPI data receive
		CALL	STEP_DSP		; STEP data refresh
		GOTO	SPICOM10
				
SSP_DATA_CHK30		
		MOVFW	SSPBUF			; Get SPI receive data again
		SUBLW	53H				; VFO select command ?
		BTFSS	STATUS,2
		GOTO	SSP_DATA_CHK40	; If not, go through
		CALL	SPICOM_DATA		; SPI data receive
		CALL	VFO_DSP			; VFO data refresh
		GOTO	SPICOM10

SSP_DATA_CHK40
		MOVFW	SSPBUF			; Get SPI receive data again
		SUBLW	54H				; TRS/REC flag command ?
		BTFSS	STATUS,2
		GOTO	SSP_DATA_CHK50	; If not,go through
		CALL	SPICOM_DATA		; SPI data refresh
		CALL	TRS_DSP			; TRS/RX info refresh
		GOTO	SPICOM10

SSP_DATA_CHK50
		MOVFW	SSPBUF			; Get SPI receive data again
		SUBLW	55H				; Memory channel data ?
		BTFSS	STATUS,2
		GOTO	SSP_DATA_CHK60	; If not, go through
		CALL	SPICOM_DATA		; SPI data refresh
		BSF		PCLATH,4		; Flag set (Page 2)
		CALL	MEMCH_DSP		; Memory info refresh
		BCF		PCLATH,4		; Flag clear (Page 0)
		GOTO	SPICOM10

SSP_DATA_CHK60

		CLR_SSPIF

		GOTO	SPICOM20

;--------------SPI Data receive after getting command -------------
SPICOM_DATA
		MOVFW	SSPBUF			; Get SPI receive data
		MOVWF   FSR				; Store it to Index reg
		CLR_SSPIF				; Clear SSPIF to prepare data receive

SPICOM_DATA10
		BANKSEL	PIR1	
		BTFSS	PIR1, SSPIF		; If receivinf has not compalated yet,
		GOTO	SPICOM_DATA10	; Goto loop

		BANKSEL SSPBUF
		MOVFW	SSPBUF			; Get SPI receive data
		MOVWF   INDF			; Store the data to appropriate address
	
		CLR_SSPIF

		RETURN
;--------------- Display Command Write Left side -----------------
DISP_COM_WR1

		MOVLW	b'00000110'		; "CS2", "CS1", "R/W" = HIgh &"E" ."D/I"=Low
		MOVWF	PORTD			
		CALL	TIME10U			; Wait 5uS

		BCF		PORTD, 2		; "E" H->L
		BCF		PORTD, 1		; "R/W" H->L
		BCF		PORTD, 0		; "D/I" Low
		BSF		PORTD, 3		; CS2 L->H
		CALL	TIME10U			; Wait 5uS

		BSF		PORTD, 2		; "E" L->H

		MOVF	DP_DATA,0		; Data Output
		MOVWF	PORTB

		CALL	TIME10U			; Wait 5uS
		
		BCF		PORTD, 2		; "E" H->L
		BSF		PORTD, 1		; "R/W" H->L
		BSF		PORTD, 3		; CS2 H->L
		BCF		PORTD, 0		; D/I Low
		
		MOVLW	0H				; Clear
		MOVWF  PORTB
		RETURN

;--------------- Display Command Write Left right -----------------
DISP_COM_WR2

		MOVLW	b'00000110'		; "CS2", "CS1", "R/W" = HIgh &"E" ."D/I"=Low
		MOVWF	PORTD			
		CALL	TIME10U			; Wait 5uS

		BCF		PORTD, 2		; "E" H->L
		BCF		PORTD, 1		; "R/W" H->L
		BCF		PORTD, 0		; "D/I" Low
		BSF		PORTD, 4		; CS2 L->H
		CALL	TIME10U			; Wait 5uS

		BSF		PORTD, 2		; "E" L->H

		MOVF	DP_DATA,0		; Data Output
		MOVWF	PORTB

		CALL	TIME10U			; Wait 5uS
		
		BCF		PORTD, 2		; "E" H->L
		BSF		PORTD, 1		; "R/W" H->L
		BSF		PORTD, 4		; CS2 H->L
		BCF		PORTD, 0		; D/I Low
		
		MOVLW	0H				; Clear
		MOVWF  PORTB
		RETURN


;----------------- Data Write to LCD  Left Side ----------------------
DISP_DATA_WR1

		MOVLW	b'00000110'		; "CS2", "CS1", "R/W" = HIgh &"E" ."D/I"=Low
		MOVWF	PORTD			
		CALL	TIME10U			; Wait 5uS

		BCF		PORTD, 2		; "E" H->L
		BCF		PORTD, 1		; "R/W" H->L
		BSF		PORTD, 0		; "D/I" L->H
		BSF		PORTD, 3		; CS1 L->H
		CALL	TIME10U			; Wait 5uS

		BSF		PORTD, 2		; "E" L->H

		MOVF	DP_DATA,0		; Data Output
		MOVWF	PORTB

		CALL	TIME10U			; Wait 5uS
		
		BCF		PORTD, 2		; "E" H->L
		BSF		PORTD, 1		; "R/W" H->L
		BSF		PORTD, 3		; CS1 H->L
		BCF		PORTD, 0		; D/I Low

		MOVF	0H				; Clear
		MOVWF	PORTB			

		RETURN

;----------------- Data Write to LCD  right Side ----------------------
DISP_DATA_WR2

		MOVLW	b'00000110'		; "CS2", "CS1", "R/W" = HIgh &"E" ."D/I"=Low
		MOVWF	PORTD			
		CALL	TIME10U			; Wait 5uS

		BCF		PORTD, 2		; "E" H->L
		BCF		PORTD, 1		; "R/W" H->L
		BSF		PORTD, 0		; "D/I" L->H
		BSF		PORTD, 4		; CS2 L->H
		CALL	TIME10U			; Wait 5uS

		BSF		PORTD, 2		; "E" L->H

		MOVF	DP_DATA,0		; Data Output
		MOVWF	PORTB

		CALL	TIME10U			; Wait 5uS
		
		BCF		PORTD, 2		; "E" H->L
		BSF		PORTD, 1		; "R/W" H->L
		BSF		PORTD, 4		; CS2 H->L
		BCF		PORTD, 0		; D/I Low	

		MOVF	0H				; Clear
		MOVWF	PORTB			

		RETURN

;----------------- Timers ---------------------------------
TIME50U						;50usec
		MOVLW	9H		
		MOVWF	CNT1		
T_LP1	
		CALL	TIME5U		;2+(25+3)*9-1=253		
		DECFSZ	CNT1,F
		GOTO	T_LP1
		RETURN				;254*0.4=100usec(about)

TIME5U						;5usec
		MOVLW	14H 		; previous =7h
		MOVWF	CNT2		
T_LP2	
		DECFSZ	CNT2,F		;2+3*7-1=22		
		GOTO	T_LP2		
		RETURN				;22+1=23

TIME500U					;500uS
		MOVLW	0AH
		MOVWF	CNT3
T_LP3
		CALL	TIME50U		;2+(254+3)*10-1=2541
		DECFSZ	CNT3,F
		GOTO	T_LP3
		RETURN				;2542

TIME2_5M						;5msec(about)
		MOVLW	3BH
		MOVWF	CNT4
T_LP4	
		CALL	TIME50U		;2+(254+3)*59-1=15164
		DECFSZ	CNT4,F
		GOTO	T_LP4
		RETURN				;15165

TIM1S
		MOVLW	0C8H		;set 200
		MOVWF	CNT5
T_LP5	
		CALL	TIME50M
		DECFSZ	CNT5,F
		GOTO	T_LP5
		RETURN

TIME50M
		MOVLW	14H			; Set 20
		MOVWF	CNT6
T_LP6
		CALL	TIME2_5M
		DECFSZ	T_LP6
		RETURN
TIME10U						;10usec
		MOVLW	2H		
		MOVWF	CNT7		
T_LP7	
		CALL	TIME5U		;2+(25+3)*9-1=253		
		DECFSZ	CNT7,F
		GOTO	T_LP7
		RETURN				;254*0.4=100usec(about)

;------------------ Page 0 End ------------------------------------
ORG 0800H
;----------------- Large degit Data Selector --------------
BIG_DATA_SELECT
	
		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	31H				; Compare character "1"
		BTFSS	STATUS,2		; If not Zero
		GOTO	BIG_DATA_SELECT_10  ; If not zero Goto the next comparison.
	
		MOVF	PCLATH,W
		MOVWF	PCLSTR
		MOVLW	0H				; Table Start Address 1E00H 
		MOVWF	OFFSET1
		MOVLW	1EH
		MOVWF	OFFSET2
		CALL	TABLE_VECT		; Call Table vector
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 
		RETURN

BIG_DATA_SELECT_10

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	32H				; Compare character "2"
		BTFSS	STATUS,2		; If not Zero
		GOTO	BIG_DATA_SELECT_20  ; If not zero Goto the next comparison.
	
		MOVF	PCLATH,W
		MOVWF	PCLSTR
		MOVLW	30H				; Table Start Address 1E30H
		MOVWF	OFFSET1
		MOVLW	1EH
		MOVWF	OFFSET2
		
		CALL	TABLE_VECT		; Call Table vector
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 
		RETURN

BIG_DATA_SELECT_20

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	33H				; Compare character "3"
		BTFSS	STATUS,2		; If not Zero
		GOTO	BIG_DATA_SELECT_30  ; If not zero Goto the next comparison.
	
		MOVF	PCLATH,W
		MOVWF	PCLSTR
		MOVLW	60H				; Table Start Address 1E60H
		MOVWF	OFFSET1
		MOVLW	1EH
		MOVWF	OFFSET2

		CALL	TABLE_VECT		; Call Table vector
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 

		RETURN

BIG_DATA_SELECT_30

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	34H				; Compare character "4"
		BTFSS	STATUS,2		; If not Zero
		GOTO	BIG_DATA_SELECT_40  ; If not zero Goto the next comparison.
	
		MOVF	PCLATH,W
		MOVWF	PCLSTR
		MOVLW	90H				; Table Start Address 1E90H
		MOVWF	OFFSET1
		MOVLW	1EH
		MOVWF	OFFSET2

		CALL	TABLE_VECT		; Call Table vector
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 

		RETURN

BIG_DATA_SELECT_40

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	35H				; Compare character "5"
		BTFSS	STATUS,2		; If not Zero
		GOTO	BIG_DATA_SELECT_50  ; If not zero Goto the next comparison.
	
		MOVF	PCLATH,W
		MOVWF	PCLSTR
		MOVLW	0xC0			; Table Start Address 1EC0H
		MOVWF	OFFSET1
		MOVLW	1EH
		MOVWF	OFFSET2

		CALL	TABLE_VECT		; Call Table vector
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 

		RETURN

BIG_DATA_SELECT_50

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	36H				; Compare character "6"
		BTFSS	STATUS,2		; If not Zero
		GOTO	BIG_DATA_SELECT_60  ; If not zero Goto the next comparison.
	
		MOVF	PCLATH,W
		MOVWF	PCLSTR
		MOVLW	0H				; Table Start Address 1F00H
		MOVWF	OFFSET1
		MOVLW	1FH
		MOVWF	OFFSET2

		CALL	TABLE_VECT		; Call Table vector
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 

		RETURN

BIG_DATA_SELECT_60

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	37H				; Compare character "7"
		BTFSS	STATUS,2		; If not Zero
		GOTO	BIG_DATA_SELECT_70  ; If not zero Goto the next comparison.
	
		MOVF	PCLATH,W
		MOVWF	PCLSTR
		MOVLW	30H				; Table Start Address 1F30H
		MOVWF	OFFSET1
		MOVLW	1FH
		MOVWF	OFFSET2

		CALL	TABLE_VECT		; Call Table vector
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 

		RETURN

BIG_DATA_SELECT_70

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	38H				; Compare character "8"
		BTFSS	STATUS,2		; If not Zero
		GOTO	BIG_DATA_SELECT_80  ; If not zero Goto the next comparison.
	
		MOVF	PCLATH,W
		MOVWF	PCLSTR
		MOVLW	60H				; Table Start Address 1F60H
		MOVWF	OFFSET1
		MOVLW	1FH
		MOVWF	OFFSET2
		
		CALL	TABLE_VECT		; Call Table vector
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 

		RETURN

BIG_DATA_SELECT_80

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	39H				; Compare character "9"
		BTFSS	STATUS,2		; If not Zero
		GOTO	BIG_DATA_SELECT_90  ; If not zero Goto the next comparison.
	
		MOVF	PCLATH,W
		MOVWF	PCLSTR
		MOVLW	90H				; Table Start Address 1F90H
		MOVWF	OFFSET1
		MOVLW	1FH
		MOVWF	OFFSET2
	
		CALL	TABLE_VECT		; Call Table vector
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 

		RETURN

BIG_DATA_SELECT_90

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	30H				; Compare character "0"
		BTFSS	STATUS,2		; If not Zero
		GOTO	BIG_DATA_SELECT_100  ; If not zero Goto the next comparison.
	
		MOVF	PCLATH,W
		MOVWF	PCLSTR
		MOVLW	0xC0			; Table Start Address 1FC0H 
		MOVWF	OFFSET1
		MOVLW	1FH
		MOVWF	OFFSET2

		CALL	TABLE_VECT		; Call Table vector
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 

		RETURN

BIG_DATA_SELECT_100

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	2EH				; Compare character "."
		BTFSS	STATUS,2		; If not Zero
		GOTO	BIG_DATA_SELECT_110  ; If not zero Goto the next comparison.
	
		MOVF	PCLATH,W
		MOVWF	PCLSTR
		MOVLW	0xC0			; Table Start Address 1DC0H
		MOVWF	OFFSET1
		MOVLW	1DH
		MOVWF	OFFSET2		

		CALL	TABLE_VECT		; Call Table vector
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 

		RETURN

BIG_DATA_SELECT_110

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	20H				; Compare character "."
		BTFSS	STATUS,2		; If not Zero
		GOTO	BIG_DATA_SELECT_120  ; If not zero Goto the next comparison.
	
		MOVF	PCLATH,W
		MOVWF	PCLSTR
		MOVLW	0x90			; Table Start Address 1DC0H
		MOVWF	OFFSET1
		MOVLW	1DH
		MOVWF	OFFSET2		

		CALL	TABLE_VECT		; Call Table vector
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 

		RETURN


BIG_DATA_SELECT_120

		RETURN
		
TABLE_VECT
		MOVF	OFFSET2,W		; point the table area to PCLATH
		MOVWF	PCLATH
		
		MOVF	OFFSET1,W
		ADDWF	LOOP_P4,0		; W=W+LOOP_P4
		MOVWF	PCL			

;---------------- LCD Data table select ----------------------
LCD_DATA_SELECT

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	30H				; Compare Character "0"
		BTFSS	STATUS,2		; If not Zero
		GOTO	LCD_DATA_SELECT_10	; If not zero Goto the next comparison.
		
		MOVF	PCLATH,W
		MOVWF	PCLSTR
	 	MOVLW	0xD8			; Character Offset
		MOVWF	OFFSET3	
		CALL	SMALL_CHR_FETCH	; Take "0" character patturn
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 
		RETURN

LCD_DATA_SELECT_10

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	31H				; Compare Character "1"
		BTFSS	STATUS,2		; If not Zero
		GOTO	LCD_DATA_SELECT_20	; If not zero Goto the next comparison.
	
		MOVF	PCLATH,W
		MOVWF	PCLSTR
		MOVLW	0xA2			; Character Offset
		MOVWF	OFFSET3	
		CALL	SMALL_CHR_FETCH	; Take "1" character patturn
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 
		RETURN

LCD_DATA_SELECT_20

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	32H				; Compare Character "2"
		BTFSS	STATUS,2		; If not Zero
		GOTO	LCD_DATA_SELECT_30	; If not zero Goto the next comparison.
		
		MOVF	PCLATH,W
		MOVWF	PCLSTR
		MOVLW	0xA8			; Character Offset
		MOVWF	OFFSET3	
		CALL	SMALL_CHR_FETCH	; Take "2" character patturn
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 
		RETURN

LCD_DATA_SELECT_30

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	33H				; Compare Character "3"
		BTFSS	STATUS,2		; If not Zero
		GOTO	LCD_DATA_SELECT_40	; If not zero Goto the next comparison.
		
		MOVF	PCLATH,W
		MOVWF	PCLSTR
		MOVLW	0xAE			; Character Offset
		MOVWF	OFFSET3	
		CALL	SMALL_CHR_FETCH	; Take "3" character patturn
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 
		RETURN

LCD_DATA_SELECT_40

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	34H				; Compare Character "4"
		BTFSS	STATUS,2		; If not Zero
		GOTO	LCD_DATA_SELECT_50	; If not zero Goto the next comparison.
		
		MOVF	PCLATH,W
		MOVWF	PCLSTR	
		MOVLW	0xB4			; Character Offset
		MOVWF	OFFSET3	
		CALL	SMALL_CHR_FETCH	; Take "4" character patturn
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 
		RETURN

LCD_DATA_SELECT_50

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	35H				; Compare Character "5"
		BTFSS	STATUS,2		; If not Zero
		GOTO	LCD_DATA_SELECT_60	; If not zero Goto the next comparison.
		
		MOVF	PCLATH,W
		MOVWF	PCLSTR	
		MOVLW	0xBA			; Character Offset
		MOVWF	OFFSET3	
		CALL	SMALL_CHR_FETCH	; Take "5" character patturn
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 
		RETURN

LCD_DATA_SELECT_60

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	36H				; Compare Character "6"
		BTFSS	STATUS,2		; If not Zero
		GOTO	LCD_DATA_SELECT_70	; If not zero Goto the next comparison.
		MOVLW	0xC0			; Character Offset
		MOVWF	OFFSET3	
		CALL	SMALL_CHR_FETCH	; Take "6" character patturn
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 
		RETURN

LCD_DATA_SELECT_70

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	37H				; Compare Character "7"
		BTFSS	STATUS,2		; If not Zero
		GOTO	LCD_DATA_SELECT_80	; If not zero Goto the next comparison.
		MOVLW	0xC6			; Character Offset
		MOVWF	OFFSET3	
		CALL	SMALL_CHR_FETCH	; Take "7" character patturn
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 
		RETURN

LCD_DATA_SELECT_80

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	38H				; Compare Character "8"
		BTFSS	STATUS,2		; If not Zero
		GOTO	LCD_DATA_SELECT_90	; If not zero Goto the next comparison.
		MOVLW	0xCC			; Character Offset
		MOVWF	OFFSET3	
		CALL	SMALL_CHR_FETCH	; Take "8" character patturn
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 
		RETURN

LCD_DATA_SELECT_90

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	39H				; Compare Character "9"
		BTFSS	STATUS,2		; If not Zero
		GOTO	LCD_DATA_SELECT_100	; If not zero Goto the next comparison.
		MOVLW	0xD2			; Character Offset
		MOVWF	OFFSET3	
		CALL	SMALL_CHR_FETCH	; Take "9" character patturn
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 	
		RETURN

LCD_DATA_SELECT_100

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	41H				; Compare Character "A"
		BTFSS	STATUS,2		; If not Zero
		GOTO	LCD_DATA_SELECT_110	; If not zero Goto the next comparison.
		MOVLW	0x06			; Character Offset
		MOVWF	OFFSET3	
		CALL	SMALL_CHR_FETCH	; Take "A" character patturn
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 
		RETURN

LCD_DATA_SELECT_110

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	42H				; Compare Character "B"
		BTFSS	STATUS,2		; If not Zero
		GOTO	LCD_DATA_SELECT_120	; If not zero Goto the next comparison.
		MOVLW	0x0C			; Character Offset
		MOVWF	OFFSET3	
		CALL	SMALL_CHR_FETCH	; Take "B" character patturn
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 
		RETURN

LCD_DATA_SELECT_120

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	43H				; Compare Character "C"
		BTFSS	STATUS,2		; If not Zero
		GOTO	LCD_DATA_SELECT_130	; If not zero Goto the next comparison.
		MOVLW	0x12			; Character Offset
		MOVWF	OFFSET3	
		CALL	SMALL_CHR_FETCH	; Take "C" character patturn
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 
		RETURN

LCD_DATA_SELECT_130

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	44H				; Compare Character "D"
		BTFSS	STATUS,2		; If not Zero
		GOTO	LCD_DATA_SELECT_140	; If not zero Goto the next comparison.
		MOVLW	0x18			; Character Offset
		MOVWF	OFFSET3	
		CALL	SMALL_CHR_FETCH	; Take "D" character patturn
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 	
		RETURN

LCD_DATA_SELECT_140

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	45H				; Compare Character "E"
		BTFSS	STATUS,2		; If not Zero
		GOTO	LCD_DATA_SELECT_150	; If not zero Goto the next comparison.
		MOVLW	0x1E			; Character Offset
		MOVWF	OFFSET3	
		CALL	SMALL_CHR_FETCH	; Take "E" character patturn
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 
		RETURN

LCD_DATA_SELECT_150

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	46H				; Compare Character "F"
		BTFSS	STATUS,2		; If not Zero
		GOTO	LCD_DATA_SELECT_160	; If not zero Goto the next comparison.
		MOVLW	0x24			; Character Offset
		MOVWF	OFFSET3	
		CALL	SMALL_CHR_FETCH	; Take "F" character patturn
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 
		RETURN

LCD_DATA_SELECT_160

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	47H				; Compare Character "G"
		BTFSS	STATUS,2		; If not Zero
		GOTO	LCD_DATA_SELECT_170	; If not zero Goto the next comparison.
		MOVLW	0x2A			; Character Offset
		MOVWF	OFFSET3	
		CALL	SMALL_CHR_FETCH	; Take "G" character patturn
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 
		RETURN

LCD_DATA_SELECT_170

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	48H				; Compare Character "H"
		BTFSS	STATUS,2		; If not Zero
		GOTO	LCD_DATA_SELECT_180	; If not zero Goto the next comparison.
		MOVLW	0x30			; Character Offset
		MOVWF	OFFSET3	
		CALL	SMALL_CHR_FETCH	; Take "H" character patturn
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 	
		RETURN

LCD_DATA_SELECT_180

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	49H				; Compare Character "I"
		BTFSS	STATUS,2		; If not Zero
		GOTO	LCD_DATA_SELECT_190	; If not zero Goto the next comparison.
		MOVLW	0x36			; Character Offset
		MOVWF	OFFSET3	
		CALL	SMALL_CHR_FETCH	; Take "I" character patturn
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 
		RETURN

LCD_DATA_SELECT_190

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	4AH				; Compare Character "J"
		BTFSS	STATUS,2		; If not Zero
		GOTO	LCD_DATA_SELECT_200	; If not zero Goto the next comparison.
		MOVLW	0x3C			; Character Offset
		MOVWF	OFFSET3	
		CALL	SMALL_CHR_FETCH	; Take "J" character patturn
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 
		RETURN

LCD_DATA_SELECT_200

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	4BH				; Compare Character "K"
		BTFSS	STATUS,2		; If not Zero
		GOTO	LCD_DATA_SELECT_210	; If not zero Goto the next comparison.
		MOVLW	0x42			; Character Offset
		MOVWF	OFFSET3	
		CALL	SMALL_CHR_FETCH	; Take "K" character patturn
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 
		RETURN

LCD_DATA_SELECT_210

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	4CH				; Compare Character "L"
		BTFSS	STATUS,2		; If not Zero
		GOTO	LCD_DATA_SELECT_220	; If not zero Goto the next comparison.
		MOVLW	0x48			; Character Offset
		MOVWF	OFFSET3	
		CALL	SMALL_CHR_FETCH	; Take "L" character patturn
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 
		RETURN	

LCD_DATA_SELECT_220

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	4DH				; Compare Character "M"
		BTFSS	STATUS,2		; If not Zero
		GOTO	LCD_DATA_SELECT_230	; If not zero Goto the next comparison.
		MOVLW	0x4E			; Character Offset
		MOVWF	OFFSET3	
		CALL	SMALL_CHR_FETCH	; Take "M" character patturn
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 
		RETURN	

LCD_DATA_SELECT_230

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	4EH				; Compare Character "N"
		BTFSS	STATUS,2		; If not Zero
		GOTO	LCD_DATA_SELECT_240	; If not zero Goto the next comparison.
		MOVLW	0x54			; Character Offset
		MOVWF	OFFSET3	
		CALL	SMALL_CHR_FETCH	; Take "N" character patturn
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 	
		RETURN	

LCD_DATA_SELECT_240

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	4FH				; Compare Character "O"
		BTFSS	STATUS,2		; If not Zero
		GOTO	LCD_DATA_SELECT_250	; If not zero Goto the next comparison.
		MOVLW	0x5A			; Character Offset
		MOVWF	OFFSET3	
		CALL	SMALL_CHR_FETCH	; Take "O" character patturn
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 
		RETURN	

LCD_DATA_SELECT_250

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	50H				; Compare Character "P"
		BTFSS	STATUS,2		; If not Zero
		GOTO	LCD_DATA_SELECT_260	; If not zero Goto the next comparison.
		MOVLW	0x60			; Character Offset
		MOVWF	OFFSET3	
		CALL	SMALL_CHR_FETCH	; Take "P" character patturn
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 	
		RETURN

LCD_DATA_SELECT_260

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	51H				; Compare Character "Q"
		BTFSS	STATUS,2		; If not Zero
		GOTO	LCD_DATA_SELECT_270	; If not zero Goto the next comparison.
		MOVLW	0x66			; Character Offset
		MOVWF	OFFSET3	
		CALL	SMALL_CHR_FETCH	; Take "Q" character patturn
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 
		RETURN

LCD_DATA_SELECT_270

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	52H				; Compare Character "R"
		BTFSS	STATUS,2		; If not Zero
		GOTO	LCD_DATA_SELECT_280	; If not zero Goto the next comparison.
		MOVLW	0x6C			; Character Offset
		MOVWF	OFFSET3	
		CALL	SMALL_CHR_FETCH	; Take "R" character patturn
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 
		RETURN

LCD_DATA_SELECT_280

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	53H				; Compare Character "S"
		BTFSS	STATUS,2		; If not Zero
		GOTO	LCD_DATA_SELECT_290	; If not zero Goto the next comparison.
		MOVLW	0x72			; Character Offset
		MOVWF	OFFSET3	
		CALL	SMALL_CHR_FETCH	; Take "S" character patturn
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 	
		RETURN

LCD_DATA_SELECT_290

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	54H				; Compare Character "T"
		BTFSS	STATUS,2		; If not Zero
		GOTO	LCD_DATA_SELECT_300	; If not zero Goto the next comparison.
		MOVLW	0x78			; Character Offset
		MOVWF	OFFSET3	
		CALL	SMALL_CHR_FETCH	; Take "T" character patturn
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 
		RETURN

LCD_DATA_SELECT_300

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	55H				; Compare Character "U"
		BTFSS	STATUS,2		; If not Zero
		GOTO	LCD_DATA_SELECT_310	; If not zero Goto the next comparison.
		MOVLW	0x7E			; Character Offset
		MOVWF	OFFSET3	
		CALL	SMALL_CHR_FETCH	; Take "U" character patturn
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 
		RETURN

LCD_DATA_SELECT_310

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	56H				; Compare Character "V"
		BTFSS	STATUS,2		; If not Zero
		GOTO	LCD_DATA_SELECT_320	; If not zero Goto the next comparison.
		MOVLW	0x84			; Character Offset
		MOVWF	OFFSET3	
		CALL	SMALL_CHR_FETCH	; Take "V" character patturn
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 	
		RETURN

LCD_DATA_SELECT_320

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	57H				; Compare Character "W"
		BTFSS	STATUS,2		; If not Zero
		GOTO	LCD_DATA_SELECT_330	; If not zero Goto the next comparison.
		MOVLW	0x8A			; Character Offset
		MOVWF	OFFSET3	
		CALL	SMALL_CHR_FETCH	; Take "W" character patturn
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 
		RETURN

LCD_DATA_SELECT_330

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	58H				; Compare Character "X"
		BTFSS	STATUS,2		; If not Zero
		GOTO	LCD_DATA_SELECT_340	; If not zero Goto the next comparison.
		MOVLW	0x90			; Character Offset
		MOVWF	OFFSET3	
		CALL	SMALL_CHR_FETCH	; Take "X" character patturn
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 
		RETURN

LCD_DATA_SELECT_340

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	59H				; Compare Character "Y"
		BTFSS	STATUS,2		; If not Zero
		GOTO	LCD_DATA_SELECT_350	; If not zero Goto the next comparison.
		MOVLW	0x96			; Character Offset
		MOVWF	OFFSET3	
		CALL	SMALL_CHR_FETCH	; Take "Y" character patturn
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 
		RETURN

LCD_DATA_SELECT_350

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	5AH				; Compare Character "Z"
		BTFSS	STATUS,2		; If not Zero
		GOTO	LCD_DATA_SELECT_360	; If not zero Goto the next comparison.
		MOVLW	0x9C			; Character Offset
		MOVWF	OFFSET3	
		CALL	SMALL_CHR_FETCH	; Take "Z" character patturn
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 
		RETURN

LCD_DATA_SELECT_360

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	3FH				; Compare Character "?"
		BTFSS	STATUS,2		; If not Zero
		GOTO	LCD_DATA_SELECT_370	; If not zero Goto the next comparison.
		MOVLW	0xE3			; Character Offset
		MOVWF	OFFSET3	
		CALL	SMALL_CHR_FETCH	; Take "?" character patturn
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 
		RETURN

LCD_DATA_SELECT_370

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	20H				; Compare Character " "
		BTFSS	STATUS,2		; If not Zero
		GOTO	LCD_DATA_SELECT_380	; If not zero Goto the next comparison.
		MOVLW	0x00			; Character Offset
		MOVWF	OFFSET3	
		CALL	SMALL_CHR_FETCH	; Take " " character patturn
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 
		RETURN

LCD_DATA_SELECT_380
	
		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	3DH				; Compare Character "="
		BTFSS	STATUS,2		; If not Zero
		GOTO	LCD_DATA_SELECT_390	; If not zero Goto the next comparison.
		MOVLW	0xE9			; Character Offset
		MOVWF	OFFSET3	
		CALL	SMALL_CHR_FETCH	; Take "=" character patturn
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 
		RETURN

LCD_DATA_SELECT_390

		MOVF	LCD_CHR,W		; Data fatch
		SUBLW	2FH				; Compare Character "/"
		BTFSS	STATUS,2		; If not Zero
		GOTO	LCD_DATA_SELECT_400	; If not zero Goto the next comparison.
		MOVLW	0xF5			; Character Offset
		MOVWF	OFFSET3	
		CALL	SMALL_CHR_FETCH	; Take "/" character patturn
		MOVWF	DP_DATA			; Store bit image
		MOVF	PCLSTR,W		
		MOVWF	PCLATH			; Restore PCLATH 
		RETURN

LCD_DATA_SELECT_400

		RETURN

SMALL_CHR_FETCH

		MOVF	PCLATH,W
		MOVWF	PCLSTR
		MOVLW	1CH				; Small Data table upper address
		MOVWF	PCLATH			; Store 
		MOVF	OFFSET3,W		; Load chacter offset
		ADDWF	LOOP_P2,W		; Add Loop_P2 + Offset3
		MOVWF	PCL


;------------------ Display "Position 1" --------------------------
POS1
		;----------- Segment 1 -----------------
		MOVLW	0B8H			; Page address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0
		CALL	DISP_COM_WR1
		BSF		PCLATH,3		; Bank1
		
		MOVLW	0C0H			; Start Line
		MOVWF	DP_DATA
		MOVWF	Line
		BCF		PCLATH,3		; Bank0
		CALL	DISP_COM_WR1
		BSF		PCLATH,3		; Bank1
	
		MOVLW	40H				; Column Address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0
		CALL	DISP_COM_WR1
		BSF		PCLATH,3		; Bank1
		
		MOVF	D_POS1,0		; Position 1 Data
		MOVWF	LCD_CHR
		BCF		PCLATH,3		; Bank0	
		CALL	BIG_CHR_WR_L_S1  ; CALL Segment 1 data write
		BCF		PCLATH,3		; Bank0
		
		;----------- Segment 2 -----------------
		MOVLW	0B9H			; Page address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0
		CALL	DISP_COM_WR1
		BSF		PCLATH,3		; Bank1
		
		MOVLW	0C0H			; Start Line
		MOVWF	DP_DATA
		MOVWF	Line
		BCF		PCLATH,3		; Bank0
		CALL	DISP_COM_WR1
		BSF		PCLATH,3		; Bank1
	
		MOVLW	40H				; Column Address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0
		CALL	DISP_COM_WR1
		BSF		PCLATH,3		; Bank1

		MOVF	D_POS1,0		; Position 1 Data
		MOVWF	LCD_CHR	
		BCF		PCLATH,3		; Bank0		
		CALL	BIG_CHR_WR_L_S2  ; CALL Segment 2
		BSF		PCLATH,3		; Bank1

		;----------- Segment 3 -----------------
		MOVLW	0BAH			; Page address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0
		CALL	DISP_COM_WR1
		BSF		PCLATH,3		; Bank1
		
		MOVLW	0C0H			; Start Line
		MOVWF	DP_DATA
		MOVWF	Line
		BCF		PCLATH,3		; Bank0
		CALL	DISP_COM_WR1
		BSF		PCLATH,3		; Bank1
	
		MOVLW	40H				; Column Address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0
		CALL	DISP_COM_WR1
		BSF		PCLATH,3		; Bank1

		MOVF	D_POS1,0		; Position 1 Data
		MOVWF	LCD_CHR	
		BCF		PCLATH,3		; Bank0		
		CALL	BIG_CHR_WR_L_S3  ; CALL Segment 3
		BSF		PCLATH,3		; Bank1

		RETURN

;------------------ Display "Position 2" --------------------------
POS2
		;----------- Segment 1 -----------------
		MOVLW	0B8H			; Page address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0	
		CALL	DISP_COM_WR1
		BSF		PCLATH,3		; Bank1
		
		MOVLW	0C0H			; Start Line
		MOVWF	DP_DATA
		MOVWF	Line
		BCF		PCLATH,3		; Bank0	
		CALL	DISP_COM_WR1
		BSF		PCLATH,3		; Bank1
	
		MOVLW	50H				; Column Address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0
		CALL	DISP_COM_WR1
		BSF		PCLATH,3		; Bank1

		MOVF	D_POS2,0		; Position 1 Data
		MOVWF	LCD_CHR	
		BCF		PCLATH,3		; Bank0	
		CALL	BIG_CHR_WR_L_S1  ; CALL Segment 1 data write
		BSF		PCLATH,3		; Bank1

		;----------- Segment 2 -----------------
		MOVLW	0B9H			; Page address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0
		CALL	DISP_COM_WR1
		BSF		PCLATH,3		; Bank1
		
		MOVLW	0C0H			; Start Line
		MOVWF	DP_DATA
		MOVWF	Line
		BCF		PCLATH,3		; Bank0	
		CALL	DISP_COM_WR1
		BSF		PCLATH,3		; Bank1
	
		MOVLW	50H				; Column Address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0	
		CALL	DISP_COM_WR1
		BSF		PCLATH,3		; Bank1

		MOVF	D_POS2,0		; Position 1 Data
		MOVWF	LCD_CHR
		BCF		PCLATH,3		; Bank0			
		CALL	BIG_CHR_WR_L_S2  ; CALL Segment 2
		BSF		PCLATH,3		; Bank1

		;----------- Segment 3 -----------------
		MOVLW	0BAH			; Page address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0		
		CALL	DISP_COM_WR1
		BSF		PCLATH,3		; Bank1
		
		MOVLW	0C0H			; Start Line
		MOVWF	DP_DATA
		MOVWF	Line
		BCF		PCLATH,3		; Bank0
		CALL	DISP_COM_WR1
		BSF		PCLATH,3		; Bank1
	
		MOVLW	50H				; Column Address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0
		CALL	DISP_COM_WR1
		BSF		PCLATH,3		; Bank1

		MOVF	D_POS2,0		; Position 1 Data
		MOVWF	LCD_CHR	
		BCF		PCLATH,3		; Bank0		
		CALL	BIG_CHR_WR_L_S3  ; CALL Segment 3
		BSF		PCLATH,3		; Bank1

		RETURN

;------------------ Display "Position 3" --------------------------
POS3
		;----------- Segment 1 -----------------
		MOVLW	0B8H			; Page address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0
		CALL	DISP_COM_WR1
		BSF		PCLATH,3		; Bank1
		
		MOVLW	0C0H			; Start Line
		MOVWF	DP_DATA
		MOVWF	Line
		BCF		PCLATH,3		; Bank0
		CALL	DISP_COM_WR1
		BSF		PCLATH,3		; Bank1
	
		MOVLW	60H				; Column Address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0
		CALL	DISP_COM_WR1
		BSF		PCLATH,3		; Bank1

		MOVF	D_POS3,0		; Position 1 Data
		MOVWF	LCD_CHR	
		BCF		PCLATH,3		; Bank0
		CALL	BIG_CHR_WR_L_S1  ; CALL Segment 1 data write
		BSF		PCLATH,3		; Bank1

		;----------- Segment 2 -----------------
		MOVLW	0B9H			; Page address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0
		CALL	DISP_COM_WR1
		BSF		PCLATH,3		; Bank1
		
		MOVLW	0C0H			; Start Line
		MOVWF	DP_DATA
		MOVWF	Line
		BCF		PCLATH,3		; Bank0
		CALL	DISP_COM_WR1
		BSF		PCLATH,3		; Bank1
	
		MOVLW	60H				; Column Address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0
		CALL	DISP_COM_WR1
		BSF		PCLATH,3		; Bank1

		MOVF	D_POS3,0		; Position 1 Data
		MOVWF	LCD_CHR	
		BCF		PCLATH,3		; Bank0
		CALL	BIG_CHR_WR_L_S2  ; CALL Segment 2
		BSF		PCLATH,3		; Bank1

		;----------- Segment 3 -----------------
		MOVLW	0BAH			; Page address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0
		CALL	DISP_COM_WR1
		BSF		PCLATH,3		; Bank1
		
		MOVLW	0C0H			; Start Line
		MOVWF	DP_DATA
		MOVWF	Line
		BCF		PCLATH,3		; Bank0
		CALL	DISP_COM_WR1
		BSF		PCLATH,3		; Bank1
	
		MOVLW	60H				; Column Address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0
		CALL	DISP_COM_WR1
		BSF		PCLATH,3		; Bank1

		MOVF	D_POS3,0		; Position 1 Data
		MOVWF	LCD_CHR	
		BCF		PCLATH,3		; Bank0		
		CALL	BIG_CHR_WR_L_S3  ; CALL Segment 3
		BSF		PCLATH,3		; Bank1

		RETURN

;------------------ Display "Position 4" --------------------------
POS4
		;----------- Segment 1 -----------------
		MOVLW	0B8H			; Page address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0	
		CALL	DISP_COM_WR1
		BSF		PCLATH,3		; Bank1
		
		MOVLW	0C0H			; Start Line
		MOVWF	DP_DATA
		MOVWF	Line
		BCF		PCLATH,3		; Bank0	
		CALL	DISP_COM_WR1
		BSF		PCLATH,3		; Bank1
	
		MOVLW	70H				; Column Address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0	
		CALL	DISP_COM_WR1
		BSF		PCLATH,3		; Bank1

		MOVF	D_POS4,0		; Position 1 Data
		MOVWF	LCD_CHR
		BCF		PCLATH,3		; Bank0	
		CALL	BIG_CHR_WR_L_S1  ; CALL Segment 1 data write
		BSF		PCLATH,3		; Bank1
		
		;----------- Segment 2 -----------------
		MOVLW	0B9H			; Page address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0	
		CALL	DISP_COM_WR1
		BSF		PCLATH,3		; Bank1
		
		MOVLW	0C0H			; Start Line
		MOVWF	DP_DATA
		MOVWF	Line
		BCF		PCLATH,3		; Bank0	
		CALL	DISP_COM_WR1
		BSF		PCLATH,3		; Bank1
	
		MOVLW	70H				; Column Address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0	
		CALL	DISP_COM_WR1
		BSF		PCLATH,3		; Bank1	

		MOVF	D_POS4,0		; Position 1 Data
		MOVWF	LCD_CHR	
		BCF		PCLATH,3		; Bank0			
		CALL	BIG_CHR_WR_L_S2  ; CALL Segment 2
		BSF		PCLATH,3		; Bank1	

		;----------- Segment 3 -----------------
		MOVLW	0BAH			; Page address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0	
		CALL	DISP_COM_WR1
		BSF		PCLATH,3		; Bank1	
		
		MOVLW	0C0H			; Start Line
		MOVWF	DP_DATA
		MOVWF	Line
		BCF		PCLATH,3		; Bank0	
		CALL	DISP_COM_WR1
		BSF		PCLATH,3		; Bank1	
	
		MOVLW	70H				; Column Address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0	
		CALL	DISP_COM_WR1
		BSF		PCLATH,3		; Bank1	

		MOVF	D_POS4,0		; Position 1 Data
		MOVWF	LCD_CHR	
		BCF		PCLATH,3		; Bank0			
		CALL	BIG_CHR_WR_L_S3  ; CALL Segment 3
		BSF		PCLATH,3		; Bank1	

		RETURN

;------------------ Display "Position 5" --------------------------
POS5
		;----------- Segment 1 -----------------
		MOVLW	0B8H			; Page address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0	
		CALL	DISP_COM_WR2
		BSF		PCLATH,3		; Bank1	
		
		MOVLW	0C0H			; Start Line
		MOVWF	DP_DATA
		MOVWF	Line
		BCF		PCLATH,3		; Bank0	
		CALL	DISP_COM_WR2
		BSF		PCLATH,3		; Bank1	
	
		MOVLW	40H				; Column Address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0	
		CALL	DISP_COM_WR2
		BSF		PCLATH,3		; Bank1	

		MOVF	D_POS5,0		; Position 1 Data
		MOVWF	LCD_CHR
		BCF		PCLATH,3		; Bank0		
		CALL	BIG_CHR_WR_R_S1  ; CALL Segment 1 data write
		BSF		PCLATH,3		; Bank1	
		
		;----------- Segment 2 -----------------
		MOVLW	0B9H			; Page address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0	
		CALL	DISP_COM_WR2
		BSF		PCLATH,3		; Bank1	
		
		MOVLW	0C0H			; Start Line
		MOVWF	DP_DATA
		MOVWF	Line
		BCF		PCLATH,3		; Bank0	
		CALL	DISP_COM_WR2
		BSF		PCLATH,3		; Bank1
	
		MOVLW	40H				; Column Address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0	
		CALL	DISP_COM_WR2
		BSF		PCLATH,3		; Bank1

		MOVF	D_POS5,0		; Position 1 Data
		MOVWF	LCD_CHR	
		BCF		PCLATH,3		; Bank0			
		CALL	BIG_CHR_WR_R_S2  ; CALL Segment 2
		BSF		PCLATH,3		; Bank1

		;----------- Segment 3 -----------------
		MOVLW	0BAH			; Page address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0
		CALL	DISP_COM_WR2
		BSF		PCLATH,3		; Bank1
		
		MOVLW	0C0H			; Start Line
		MOVWF	DP_DATA
		MOVWF	Line
		BCF		PCLATH,3		; Bank0
		CALL	DISP_COM_WR2
		BSF		PCLATH,3		; Bank1
	
		MOVLW	40H				; Column Address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0
		CALL	DISP_COM_WR2
		BSF		PCLATH,3		; Bank1

		MOVF	D_POS5,0		; Position 1 Data
		MOVWF	LCD_CHR
		BCF		PCLATH,3		; Bank0			
		CALL	BIG_CHR_WR_R_S3  ; CALL Segment 3
		BSF		PCLATH,3		; Bank1

		RETURN

;------------------ Display "Position 6" --------------------------
POS6
		;----------- Segment 1 -----------------
		MOVLW	0B8H			; Page address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0	
		CALL	DISP_COM_WR2
		BSF		PCLATH,3		; Bank1
		
		MOVLW	0C0H			; Start Line
		MOVWF	DP_DATA
		MOVWF	Line
		BCF		PCLATH,3		; Bank0	
		CALL	DISP_COM_WR2
		BSF		PCLATH,3		; Bank1
	
		MOVLW	50H				; Column Address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0	
		CALL	DISP_COM_WR2
		BSF		PCLATH,3		; Bank1

		MOVF	D_POS6,0		; Position 1 Data
		MOVWF	LCD_CHR	
		BCF		PCLATH,3		; Bank0			
		CALL	BIG_CHR_WR_R_S1  ; CALL Segment 1 data write
		BSF		PCLATH,3		; Bank1
		
		;----------- Segment 2 -----------------
		MOVLW	0B9H			; Page address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0		
		CALL	DISP_COM_WR2
		BSF		PCLATH,3		; Bank1
		
		MOVLW	0C0H			; Start Line
		MOVWF	DP_DATA
		MOVWF	Line
		BCF		PCLATH,3		; Bank0	
		CALL	DISP_COM_WR2
		BSF		PCLATH,3		; Bank1
	
		MOVLW	50H				; Column Address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0
		CALL	DISP_COM_WR2
		BSF		PCLATH,3		; Bank1

		MOVF	D_POS6,0		; Position 1 Data
		MOVWF	LCD_CHR	
		BCF		PCLATH,3		; Bank0		
		CALL	BIG_CHR_WR_R_S2  ; CALL Segment 2
		BSF		PCLATH,3		; Bank1

		;----------- Segment 3 -----------------
		MOVLW	0BAH			; Page address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0
		CALL	DISP_COM_WR2
		BSF		PCLATH,3		; Bank1

		MOVLW	0C0H			; Start Line
		MOVWF	DP_DATA
		MOVWF	Line
		BCF		PCLATH,3		; Bank0
		CALL	DISP_COM_WR2
		BSF		PCLATH,3		; Bank1
	
		MOVLW	50H				; Column Address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0
		CALL	DISP_COM_WR2
		BSF		PCLATH,3		; Bank1

		MOVF	D_POS6,0		; Position 1 Data
		MOVWF	LCD_CHR	
		BCF		PCLATH,3		; Bank0		
		CALL	BIG_CHR_WR_R_S3  ; CALL Segment 3
		BSF		PCLATH,3		; Bank1

		RETURN

;------------------ Display "Position 7" --------------------------
POS7
		;----------- Segment 1 -----------------
		MOVLW	0B8H			; Page address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0	
		CALL	DISP_COM_WR2
		BSF		PCLATH,3		; Bank1
		
		MOVLW	0C0H			; Start Line
		MOVWF	DP_DATA
		MOVWF	Line
		BCF		PCLATH,3		; Bank0	
		CALL	DISP_COM_WR2
		BSF		PCLATH,3		; Bank1
	
		MOVLW	60H				; Column Address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0	
		CALL	DISP_COM_WR2
		BSF		PCLATH,3		; Bank1

		MOVF	D_POS7,0		; Position 1 Data
		MOVWF	LCD_CHR	
		BCF		PCLATH,3		; Bank0			
		CALL	BIG_CHR_WR_R_S1  ; CALL Segment 1 data write
		BSF		PCLATH,3		; Bank1	

		;----------- Segment 2 -----------------
		MOVLW	0B9H			; Page address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0	
		CALL	DISP_COM_WR2
		BSF		PCLATH,3		; Bank1	
		
		MOVLW	0C0H			; Start Line
		MOVWF	DP_DATA
		MOVWF	Line
		BCF		PCLATH,3		; Bank0
		CALL	DISP_COM_WR2
		BSF		PCLATH,3		; Bank1	
	
		MOVLW	60H				; Column Address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0
		CALL	DISP_COM_WR2
		BSF		PCLATH,3		; Bank1	

		MOVF	D_POS7,0		; Position 1 Data
		MOVWF	LCD_CHR	
		BCF		PCLATH,3		; Bank0		
		CALL	BIG_CHR_WR_R_S2  ; CALL Segment 2
		BSF		PCLATH,3		; Bank1	

		;----------- Segment 3 -----------------
		MOVLW	0BAH			; Page address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0	
		CALL	DISP_COM_WR2
		BSF		PCLATH,3		; Bank1	
		
		MOVLW	0C0H			; Start Line
		MOVWF	DP_DATA
		MOVWF	Line
		BCF		PCLATH,3		; Bank0	
		CALL	DISP_COM_WR2
		BSF		PCLATH,3		; Bank1	
	
		MOVLW	60H				; Column Address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0
		CALL	DISP_COM_WR2
		BSF		PCLATH,3		; Bank1	

		MOVF	D_POS7,0		; Position 1 Data
		MOVWF	LCD_CHR	
		BCF		PCLATH,3		; Bank0		
		CALL	BIG_CHR_WR_R_S3  ; CALL Segment 3
		BSF		PCLATH,3		; Bank1	

		RETURN

;------------------ Display "Position 8" --------------------------
POS8
		;----------- Segment 1 -----------------
		MOVLW	0B8H			; Page address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0	
		CALL	DISP_COM_WR2
		BSF		PCLATH,3		; Bank1	
		
		MOVLW	0C0H			; Start Line
		MOVWF	DP_DATA
		MOVWF	Line
		BCF		PCLATH,3		; Bank0
		CALL	DISP_COM_WR2
		BSF		PCLATH,3		; Bank1	
	
		MOVLW	70H				; Column Address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0
		CALL	DISP_COM_WR2
		BSF		PCLATH,3		; Bank1

		MOVF	D_POS8,0		; Position 1 Data
		MOVWF	LCD_CHR	
		BCF		PCLATH,3		; Bank0		
		CALL	BIG_CHR_WR_R_S1  ; CALL Segment 1 data write
		BSF		PCLATH,3		; Bank1
		
		;----------- Segment 2 -----------------
		MOVLW	0B9H			; Page address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0	
		CALL	DISP_COM_WR2
		BSF		PCLATH,3		; Bank1
		
		MOVLW	0C0H			; Start Line
		MOVWF	DP_DATA
		MOVWF	Line
		BCF		PCLATH,3		; Bank0	
		CALL	DISP_COM_WR2
		BSF		PCLATH,3		; Bank1
	
		MOVLW	70H				; Column Address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0
		CALL	DISP_COM_WR2
		BSF		PCLATH,3		; Bank1

		MOVF	D_POS8,0		; Position 1 Data
		MOVWF	LCD_CHR	
		BCF		PCLATH,3		; Bank0		
		CALL	BIG_CHR_WR_R_S2  ; CALL Segment 2
		BSF		PCLATH,3		; Bank1

		;----------- Segment 3 -----------------
		MOVLW	0BAH			; Page address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0		
		CALL	DISP_COM_WR2
		BSF		PCLATH,3		; Bank1
		
		MOVLW	0C0H			; Start Line
		MOVWF	DP_DATA
		MOVWF	Line
		BCF		PCLATH,3		; Bank0	
		CALL	DISP_COM_WR2
		BSF		PCLATH,3		; Bank1
	
		MOVLW	70H				; Column Address
		MOVWF	DP_DATA
		BCF		PCLATH,3		; Bank0	
		CALL	DISP_COM_WR2
		BSF		PCLATH,3		; Bank1

		MOVF	D_POS8,0		; Position 1 Data
		MOVWF	LCD_CHR
		BCF		PCLATH,3		; Bank0			
		CALL	BIG_CHR_WR_R_S3  ; CALL Segment 3
		BSF		PCLATH,3		; Bank1

		RETURN

;--------------------- EEPROM Write ----------------------------------
EEP_WR
		BSF		STATUS,RP1		; Select bank3
		BSF		STATUS,RP0		
		BTFSC	EECON1,WR		; Wait for write
		GOTO	$-1				; To complete

		BCF		STATUS,RP0		; Select bank2
		MOVF	EE_ADDR,0		; Set address
		MOVWF	EEADR			;
		MOVF	EE_DATA,0		; Set data
		MOVWF	EEDATA			;
		BSF		STATUS,RP0		; Select bank3
		BCF		EECON1,EEPGD	; Select "Data memory" in EEPROM
		BSF		EECON1,WREN		; Enable write

		MOVLW	55H				; Dummy write 55H
		MOVWF	EECON2			; Write
		MOVLW	0AAH			; Dummy write AAH
		MOVWF	EECON2			; Write
		BSF		EECON1,WR		; Set WR bit to begin write
		BCF		EECON1,WREN		; Disable write

		BCF		STATUS,RP1		; Bank0
		BCF		STATUS,RP0			

		RETURN

;--------------------- EEPROM Read -----------------------------------
EEP_RD  ; W reg has address data when call the routine. The routine reads
        ; EEPROM data and transfer to w reg and return.

		BSF		STATUS,RP1		; Select bank2
		BCF		STATUS,RP0
		MOVWF	EEADR			; Set read address
		BSF		STATUS,RP0		; Select bank3
		BCF		EECON1,EEPGD	; Select "Data memory" in EEPROM
		BSF		EECON1,RD		; Read enable
		
		BCF		STATUS,RP0		; Back to bank2
		MOVF	EEDATA,W		; Read data
		MOVWF	PORTA
		BCF		STATUS,RP1		; Back to bank0

		RETURN

;----------------------- MODE Read from EEPROM --------------------------------
EEP_MODE
		MOVLW	50H				; Set EEPROM reading address
		CALL	EEP_RD			; Read EEPROM data
		MOVWF	Mode			; Store Mode data to RAM
		SUBLW	01H				; CW? 
		BTFSC	STATUS,2		; If CW then goto next process
		GOTO	EEP_MODE10

		MOVFW	Mode
		SUBLW	02H				; SSB? 
		BTFSC	STATUS,2		; If SSB then goto next process
		GOTO	EEP_MODE10
	
		MOVFW	Mode
		SUBLW	03H				; AM? 
		BTFSC	STATUS,2		; If AM then goto next process
		GOTO	EEP_MODE10

		MOVLW	02H				; If EEPROM data is inlavid, "SSB" as 02H
		MOVWF	Mode

EEP_MODE10
		RETURN

;---------------------- Step EEPROM ---------------------------------
EEP_STEP
		MOVLW	52H				; Set EEPROM reading address
		CALL	EEP_RD			; Read EEPROM data
		MOVWF	STEP_RATE		; Store Step data to RAM
		SUBLW	21H				; 1KHz ?
		BTFSC	STATUS,2		; If 1KHz then goto next process
		GOTO	EEP_STEP10

		MOVFW	STEP_RATE
		SUBLW	22H				; 100Hz
		BTFSC	STATUS,2		; If 100Hz then goto next process
		GOTO	EEP_STEP10

		MOVFW	STEP_RATE
		SUBLW	23H				; 10KHz
		BTFSC	STATUS,2		; If 10KHz then goto next process
		GOTO	EEP_STEP10

		MOVLW	22H				; If EEPROM data is invalid, "100Hz" as 22H
		MOVWF	STEP_RATE

EEP_STEP10
		RETURN
;--------------- Read VFO Ch data from EEPROM -------------------------
EEP_VFO
		MOVLW	53H				; Set EEPROM reading address
		CALL	EEP_RD			; Read EEPROM data
		MOVWF	VFO_SEL			; Store Step data to RAM
		SUBLW	01H				; VFO=A ?
		BTFSS	STATUS,2		; If "VFO"=A then goto next process
		GOTO	EEP_VFO_10
		
		MOVFW	VFO_A_BIN_L		; BIN_L2 <= VFO_A_BIN_L
		MOVWF	BIN_L2
		MOVFW	VFO_A_BIN_H		; BIN_H2 <= VFO_A_BIN_H
		MOVWF	BIN_H2

		GOTO    EEP_VFO_40

EEP_VFO_10
		MOVFW	VFO_SEL
		SUBLW	02H				; VFO=B ?
		BTFSS	STATUS,2		; If "VFO"=B then goto next process
		GOTO	EEP_VFO_20

		MOVFW	VFO_B_BIN_L		; BIN_L2 <= VFO_B_BIN_L
		MOVWF	BIN_L2
		MOVFW	VFO_B_BIN_H		; BIN_H2 <= VFO_B_BIN_H
		MOVWF	BIN_H2

		GOTO    EEP_VFO_40

EEP_VFO_20
		MOVFW	VFO_SEL
		SUBLW	03H				; VFO=A/B?
		BTFSS	STATUS,2		; If "VFO="A/B then goto next process
		GOTO	EEP_VFO_30

		MOVFW	VFO_A_BIN_L		; BIN_L2 <= VFO_A_BIN_L
		MOVWF	BIN_L2
		MOVFW	VFO_A_BIN_H		; BIN_H2 <= VFO_A_BIN_H
		MOVWF	BIN_H2

EEP_VFO_30
		MOVLW	01H				; If EEPROM data is invalid, Data is forced to write
		MOVWF	VFO_SEL

EEP_VFO_40
		RETURN



;--------------- Write Frequency data to EEPROM ----------------------
EEP_FREQ_WR

;		MOVLW	47H				; Set "BIN_L2" address in RAM to EEPROM writing
;		BANKSEL	EEADR
;		MOVWF	EE_ADDR	
;		BANKSEL	PIR1		
;		MOVF	BIN_L2,W		
;		BANKSEL	EEDATA
;		MOVWF	EE_DATA
;		CALL	EEP_WR
;		BANKSEL	PIR1

;		MOVLW	48H				; Set "BIN_H2" address in RAM to EEPROM writing
;		BANKSEL	EEADR
;		MOVWF	EE_ADDR	
;		BANKSEL	PIR1		
;		MOVF	BIN_H2,W		
;		BANKSEL	EEDATA
;		MOVWF	EE_DATA
;		CALL	EEP_WR
;		BANKSEL	PIR1

		MOVLW	6CH				; Set "VFO_A_BIN_L" address in RAM to EEPROM writing
		BANKSEL	EEADR
		MOVWF	EE_ADDR	
		BANKSEL	PIR1		
		MOVF	VFO_A_BIN_L,W		
		BANKSEL	EEDATA
		MOVWF	EE_DATA
		CALL	EEP_WR
		BANKSEL	PIR1

		MOVLW	6DH				; Set "VFO_A_BIN_H" address in RAM to EEPROM writing
		BANKSEL	EEADR
		MOVWF	EE_ADDR	
		BANKSEL	PIR1		
		MOVF	VFO_A_BIN_H,W		
		BANKSEL	EEDATA
		MOVWF	EE_DATA
		CALL	EEP_WR
		BANKSEL	PIR1

		MOVLW	6EH				; Set "VFO_B_BIN_L" address in RAM to EEPROM writing
		BANKSEL	EEADR
		MOVWF	EE_ADDR	
		BANKSEL	PIR1		
		MOVF	VFO_B_BIN_L,W		
		BANKSEL	EEDATA
		MOVWF	EE_DATA
		CALL	EEP_WR
		BANKSEL	PIR1

		MOVLW	6FH				; Set "VFO_B_BIN_H" address in RAM to EEPROM writing
		BANKSEL	EEADR
		MOVWF	EE_ADDR	
		BANKSEL	PIR1		
		MOVF	VFO_B_BIN_H,W		
		BANKSEL	EEDATA
		MOVWF	EE_DATA
		CALL	EEP_WR
		BANKSEL	PIR1

		RETURN
;------------------- Read Frequency data to EEPROM ---------------------
EEP_FREQ_RD
;		MOVLW	47H				; Set EEPROM read address of Low data
;		CALL	EEP_RD			; Read EEPROM data
;		MOVWF	BIN_L2			; Store Step data to RAM
;		MOVLW	48H				; Set EEPROM read address of high data 
;		CALL	EEP_RD			; Read EEPROM data
;		MOVWF	BIN_H2			; Store Step data to RAM

		MOVLW	6CH				; Set EEPROM read address of VFO A Low data 
		CALL	EEP_RD			; Read EEPROM data
		MOVWF	VFO_A_BIN_L		; Store Step data to RAM
		MOVLW	6DH				; Set EEPROM read address of VFO A high data 
		CALL	EEP_RD			; Read EEPROM data
		MOVWF	VFO_A_BIN_H		; Store Step data to RAM

		MOVLW	6EH				; Set EEPROM read address of VFO B Low data
		CALL	EEP_RD			; Read EEPROM data
		MOVWF	VFO_B_BIN_L		; Store Step data to RAM
		MOVLW	6FH				; Set EEPROM read address of VFO B high data 
		CALL	EEP_RD			; Read EEPROM data
		MOVWF	VFO_B_BIN_H		; Store Step data to RAM

		RETURN
;---------------- Read Memory channel data from EEPROM ------------------
EEP_MEM_RD
		
; Ch1 data restore
		MOVLW	0A0H			; Set EEPROM read address of Memory Ch1 of Freq low byte
		CALL	EEP_RD			; Read EEPROM data
		BSF		STATUS,RP0		; Data Bank 1 
		MOVWF	CH1_BIN_L		; Restore data to CH1_BIN_L
		BCF		STATUS,RP0		; Data bank 0
		MOVLW	0A1H			; Set EEPROM read address of Memory Ch1 of Freq high byte
		CALL	EEP_RD			; Read EEPROM data
		BSF		STATUS,RP0		; Data Bank 1
		MOVWF	CH1_BIN_H		; Restore data to CH1_BIN_H
		BCF		STATUS,RP0		; Data bank 0
		MOVLW	0A2H			; Set EEPROM read address of Memory Ch1 of Mode data
		CALL	EEP_RD			; Read EEPROM data
		BSF		STATUS,RP0		; Data Bank 1 
		MOVWF	CH1_MD			; Restore data to CH1_MD
		BCF		STATUS,RP0		; Data bank 0

; Ch2 data restore
		MOVLW	0A3H			; Set EEPROM read address of Memory Ch2 of Freq low byte
		CALL	EEP_RD			; Read EEPROM data
		BSF		STATUS,RP0		; Data Bank 1 
		MOVWF	CH2_BIN_L		; Restore data to CH2_BIN_L
		BCF		STATUS,RP0		; Data bank 0
		MOVLW	0A4H			; Set EEPROM read address of Memory Ch2 of Freq high byte
		CALL	EEP_RD			; Read EEPROM data
		BSF		STATUS,RP0		; Data Bank 1 
		MOVWF	CH2_BIN_H		; Restore data to CH2_BIN_H
		BCF		STATUS,RP0		; Data bank 0
		MOVLW	0A5H			; Set EEPROM read address of Memory Ch2 of Mode data
		CALL	EEP_RD			; Read EEPROM data
		BSF		STATUS,RP0		; Data Bank 1 
		MOVWF	CH2_MD			; Restore data to CH2_MD
		BCF		STATUS,RP0		; Data bank 0

; Ch3 data restore
		MOVLW	0A6H			; Set EEPROM read address of Memory Ch3 of Freq low byte
		CALL	EEP_RD			; Read EEPROM data
		BSF		STATUS,RP0		; Data Bank 1 
		MOVWF	CH3_BIN_L		; Restore data to CH3_BIN_L
		BCF		STATUS,RP0		; Data bank 0
		MOVLW	0A7H			; Set EEPROM read address of Memory Ch3 of Freq high byte
		CALL	EEP_RD			; Read EEPROM data
		BSF		STATUS,RP0		; Data Bank 1 
		MOVWF	CH3_BIN_H		; Restore data to CH3_BIN_H
		BCF		STATUS,RP0		; Data bank 0
		MOVLW	0A8H			; Set EEPROM read address of Memory Ch3 of Mode data
		CALL	EEP_RD			; Read EEPROM data
		BSF		STATUS,RP0		; Data Bank 1 
		MOVWF	CH3_MD			; Restore data to CH3_MD
		BCF		STATUS,RP0		; Data bank 0

; Ch4 data restore
		MOVLW	0A9H			; Set EEPROM read address of Memory Ch4 of Freq low byte
		CALL	EEP_RD			; Read EEPROM data
		BSF		STATUS,RP0		; Data Bank 1 
		MOVWF	CH4_BIN_L		; Restore data to CH4_BIN_L
		BCF		STATUS,RP0		; Data bank 0
		MOVLW	0AAH			; Set EEPROM read address of Memory Ch4 of Freq high byte
		CALL	EEP_RD			; Read EEPROM data
		BSF		STATUS,RP0		; Data Bank 1
		MOVWF	CH4_BIN_H		; Restore data to CH4_BIN_H
		BCF		STATUS,RP0		; Data bank 0
		MOVLW	0ABH			; Set EEPROM read address of Memory Ch4 of Mode data
		CALL	EEP_RD			; Read EEPROM data
		BSF		STATUS,RP0		; Data Bank 1
		MOVWF	CH4_MD			; Restore data to CH4_MD
		BCF		STATUS,RP0		; Data bank 0		

; Ch5 data restore
		MOVLW	0ACH			; Set EEPROM read address of Memory Ch5 of Freq low byte
		CALL	EEP_RD			; Read EEPROM data
		BSF		STATUS,RP0		; Data Bank 1 
		MOVWF	CH5_BIN_L		; Restore data to CH5_BIN_L
		BCF		STATUS,RP0		; Data bank 0
		MOVLW	0ADH			; Set EEPROM read address of Memory Ch5 of Freq high byte
		CALL	EEP_RD			; Read EEPROM data
		BSF		STATUS,RP0		; Data Bank 1
		MOVWF	CH5_BIN_H		; Restore data to CH5_BIN_H
		BCF		STATUS,RP0		; Data bank 0
		MOVLW	0AEH			; Set EEPROM read address of Memory Ch5 of Mode data
		CALL	EEP_RD			; Read EEPROM data
		BSF		STATUS,RP0		; Data Bank 1
		MOVWF	CH5_MD			; Restore data to CH5_MD
		BCF		STATUS,RP0		; Data bank 0		
	
; Ch6 data restore
		MOVLW	0AFH			; Set EEPROM read address of Memory Ch6 of Freq low byte
		CALL	EEP_RD			; Read EEPROM data
		BSF		STATUS,RP0		; Data Bank 1 
		MOVWF	CH6_BIN_L		; Restore data to CH6_BIN_L
		BCF		STATUS,RP0		; Data bank 0
		MOVLW	0B0H			; Set EEPROM read address of Memory Ch5 of Freq high byte
		CALL	EEP_RD			; Read EEPROM data
		BSF		STATUS,RP0		; Data Bank 1
		MOVWF	CH6_BIN_H		; Restore data to CH6_BIN_H
		BCF		STATUS,RP0		; Data bank 0
		MOVLW	0B1H			; Set EEPROM read address of Memory Ch6 of Mode data
		CALL	EEP_RD			; Read EEPROM data
		BSF		STATUS,RP0		; Data Bank 1
		MOVWF	CH6_MD			; Restore data to CH6_MD
		BCF		STATUS,RP0		; Data bank 0

; Ch7 data restore
		MOVLW	0B2H			; Set EEPROM read address of Memory Ch7 of Freq low byte
		CALL	EEP_RD			; Read EEPROM data
		BSF		STATUS,RP0		; Data Bank 1
		MOVWF	CH7_BIN_L		; Restore data to CH7_BIN_L
		BCF		STATUS,RP0		; Data bank 0
		MOVLW	0B3H			; Set EEPROM read address of Memory Ch7 of Freq high byte
		CALL	EEP_RD			; Read EEPROM data
		BSF		STATUS,RP0		; Data Bank 1
		MOVWF	CH7_BIN_H		; Restore data to CH7_BIN_H
		BCF		STATUS,RP0		; Data bank 0
		MOVLW	0B4H			; Set EEPROM read address of Memory Ch7 of Mode data
		CALL	EEP_RD			; Read EEPROM data
		BSF		STATUS,RP0		; Data Bank 1
		MOVWF	CH7_MD			; Restore data to CH7_MD
		BCF		STATUS,RP0		; Data bank 0

; Ch8 data restore
		MOVLW	0B5H			; Set EEPROM read address of Memory Ch8 of Freq low byte
		CALL	EEP_RD			; Read EEPROM data
		BSF		STATUS,RP0		; Data Bank 1
		MOVWF	CH8_BIN_L		; Restore data to CH8_BIN_L
		BCF		STATUS,RP0		; Data bank 0
		MOVLW	0B6H			; Set EEPROM read address of Memory Ch8 of Freq high byte
		CALL	EEP_RD			; Read EEPROM data
		BSF		STATUS,RP0		; Data Bank 1
		MOVWF	CH8_BIN_H		; Restore data to CH8_BIN_H
		BCF		STATUS,RP0		; Data bank 0
		MOVLW	0B7H			; Set EEPROM read address of Memory Ch8 of Mode data
		CALL	EEP_RD			; Read EEPROM data
		BSF		STATUS,RP0		; Data Bank 1
		MOVWF	CH8_MD			; Restore data to CH8_MD
		BCF		STATUS,RP0		; Data bank 0

; Ch9 data restore
		MOVLW	0B8H			; Set EEPROM read address of Memory Ch9 of Freq low byte
		CALL	EEP_RD			; Read EEPROM data
		BSF		STATUS,RP0		; Data Bank 1
		MOVWF	CH9_BIN_L		; Restore data to CH9_BIN_L
		BCF		STATUS,RP0		; Data bank 0
		MOVLW	0B9H			; Set EEPROM read address of Memory Ch9 of Freq high byte
		CALL	EEP_RD			; Read EEPROM data
		BSF		STATUS,RP0		; Data Bank 1
		MOVWF	CH9_BIN_H		; Restore data to CH9_BIN_H
		BCF		STATUS,RP0		; Data bank 0
		MOVLW	0BAH			; Set EEPROM read address of Memory Ch9 of Mode data
		CALL	EEP_RD			; Read EEPROM data
		BSF		STATUS,RP0		; Data Bank 1
		MOVWF	CH9_MD			; Restore data to CH9_MD
		BCF		STATUS,RP0		; Data bank 0

		MOVLW	71H				; Set EEPROM read address of Memoey selection 
		CALL	EEP_RD			; Read EEPROM data
		MOVWF	MEM_CH			; Set data to MEM_CH
		
		RETURN
;--------------- Memory data store to EEPROM -------------------
EEP_MEM_WR

;-----For Channel 1 -----
		MOVLW	0A0H				; Set Ch1 lower data to EEPROM writing
		BANKSEL	EEADR
		MOVWF	EE_ADDR	
		BANKSEL	TRISA				; Bank1		
		MOVF	CH1_BIN_L,W		
		BANKSEL	EEDATA
		MOVWF	EE_DATA
		CALL	EEP_WR

		MOVLW	0A1H				; Set Ch1 Higher data to EEPROM writing
		BANKSEL	EEADR
		MOVWF	EE_ADDR	
		BANKSEL	TRISA				; Bank 1		
		MOVF	CH1_BIN_H,W		
		BANKSEL	EEDATA
		MOVWF	EE_DATA
		CALL	EEP_WR

;-----For Channel 2 -----
		MOVLW	0A3H				; Set Ch2 lower data to EEPROM writing
		BANKSEL	EEADR
		MOVWF	EE_ADDR	
		BANKSEL	TRISA				; Bank 1		
		MOVF	CH2_BIN_L,W		
		BANKSEL	EEDATA
		MOVWF	EE_DATA
		CALL	EEP_WR

		MOVLW	0A4H				; Set Ch2 Higher data to EEPROM writing
		BANKSEL	EEADR
		MOVWF	EE_ADDR	
		BANKSEL	TRISA				; Bank 1		
		MOVF	CH2_BIN_H,W		
		BANKSEL	EEDATA
		MOVWF	EE_DATA
		CALL	EEP_WR

;-----For Channel 3 -----
		MOVLW	0A6H				; Set Ch3 lower data to EEPROM writing
		BANKSEL	EEADR
		MOVWF	EE_ADDR	
		BANKSEL	TRISA				; Bank 1		
		MOVF	CH3_BIN_L,W		
		BANKSEL	EEDATA
		MOVWF	EE_DATA
		CALL	EEP_WR

		MOVLW	0A7H				; Set Ch3 Higher data to EEPROM writing
		BANKSEL	EEADR
		MOVWF	EE_ADDR	
		BANKSEL	TRISA				; Bank 1		
		MOVF	CH3_BIN_H,W		
		BANKSEL	EEDATA
		MOVWF	EE_DATA
		CALL	EEP_WR

;-----For Channel 4 -----
		MOVLW	0A9H				; Set Ch4 lower data to EEPROM writing
		BANKSEL	EEADR
		MOVWF	EE_ADDR	
		BANKSEL	TRISA				; Bank 1		
		MOVF	CH4_BIN_L,W		
		BANKSEL	EEDATA
		MOVWF	EE_DATA
		CALL	EEP_WR

		MOVLW	0AAH				; Set Ch4 Higher data to EEPROM writing
		BANKSEL	EEADR
		MOVWF	EE_ADDR	
		BANKSEL	TRISA				; Bank 1		
		MOVF	CH4_BIN_H,W		
		BANKSEL	EEDATA
		MOVWF	EE_DATA
		CALL	EEP_WR

;-----For Channel 5 -----
		MOVLW	0ACH				; Set Ch5 lower data to EEPROM writing
		BANKSEL	EEADR
		MOVWF	EE_ADDR	
		BANKSEL	TRISA				; Bank 1		
		MOVF	CH5_BIN_L,W		
		BANKSEL	EEDATA
		MOVWF	EE_DATA
		CALL	EEP_WR

		MOVLW	0ADH				; Set Ch5 Higher data to EEPROM writing
		BANKSEL	EEADR
		MOVWF	EE_ADDR	
		BANKSEL	TRISA				; Bank 1		
		MOVF	CH5_BIN_H,W		
		BANKSEL	EEDATA
		MOVWF	EE_DATA
		CALL	EEP_WR

;-----For Channel 6 -----
		MOVLW	0AFH				; Set Ch6 lower data to EEPROM writing
		BANKSEL	EEADR
		MOVWF	EE_ADDR	
		BANKSEL	TRISA				; Bank 1		
		MOVF	CH6_BIN_L,W		
		BANKSEL	EEDATA
		MOVWF	EE_DATA
		CALL	EEP_WR

		MOVLW	0B0H				; Set Ch6 Higher data to EEPROM writing
		BANKSEL	EEADR
		MOVWF	EE_ADDR	
		BANKSEL	TRISA				; Bank 1		
		MOVF	CH6_BIN_H,W		
		BANKSEL	EEDATA
		MOVWF	EE_DATA
		CALL	EEP_WR

;-----For Channel 7 -----
		MOVLW	0B2H				; Set Ch7 lower data to EEPROM writing
		BANKSEL	EEADR
		MOVWF	EE_ADDR				; Bank 1
		BANKSEL	TRISA		
		MOVF	CH7_BIN_L,W		
		BANKSEL	EEDATA
		MOVWF	EE_DATA
		CALL	EEP_WR

		MOVLW	0B3H				; Set Ch7 Higher data to EEPROM writing
		BANKSEL	EEADR
		MOVWF	EE_ADDR	
		BANKSEL	TRISA				; Bank 1
		MOVF	CH7_BIN_H,W		
		BANKSEL	EEDATA
		MOVWF	EE_DATA
		CALL	EEP_WR

;-----For Channel 8 -----
		MOVLW	0B5H				; Set Ch8 lower data to EEPROM writing
		BANKSEL	EEADR
		MOVWF	EE_ADDR	
		BANKSEL	TRISA				; Bank 1		
		MOVF	CH8_BIN_L,W		
		BANKSEL	EEDATA
		MOVWF	EE_DATA
		CALL	EEP_WR

		MOVLW	0B6H				; Set Ch8 Higher data to EEPROM writing
		BANKSEL	EEADR
		MOVWF	EE_ADDR	
		BANKSEL	TRISA				; Bank 1		
		MOVF	CH8_BIN_H,W		
		BANKSEL	EEDATA
		MOVWF	EE_DATA
		CALL	EEP_WR
		BANKSEL	PIR1

;-----For Channel 9 -----
		MOVLW	0B8H				; Set Ch9 lower data to EEPROM writing
		BANKSEL	EEADR
		MOVWF	EE_ADDR	
		BANKSEL	TRISA				; Bank 1		
		MOVF	CH9_BIN_L,W		
		BANKSEL	EEDATA
		MOVWF	EE_DATA
		CALL	EEP_WR

		MOVLW	0B9H				; Set Ch9 Higher data to EEPROM writing
		BANKSEL	EEADR
		MOVWF	EE_ADDR	
		BANKSEL	TRISA				; Bank 1		
		MOVF	CH9_BIN_H,W		
		BANKSEL	EEDATA
		MOVWF	EE_DATA
		CALL	EEP_WR

		RETURN

;-------------------<Page 2 >-----------------------------------
		ORG 1000H
;------------- Display "MEM CH " ------------------------------
MEMCH_DSP

		MOVLW	0BCH			; Page address
		MOVWF	DP_DATA
		BCF		PCLATH,4		; Page 0
		CALL	DISP_COM_WR2
		BSF		PCLATH,4		; Page 2

		MOVLW	0C0H			; Start Line
		MOVWF	DP_DATA
		MOVWF	Line
		BCF		PCLATH,4		; Page 0	
		CALL	DISP_COM_WR2
		BSF		PCLATH,4		; Page 2

		MOVLW	40H				; Column Address
		MOVWF	DP_DATA
		BCF		PCLATH,4		; Page 0
		CALL	DISP_COM_WR2
		BSF		PCLATH,4		; Page 2

		MOVLW	4DH				; [M]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	45H				; [E]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2		
		MOVLW	4DH				; [M]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	3DH				; [=]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 0

MEMCH_WR
		MOVF	MEM_SEL,W		; Load key data
		SUBLW	05H				; "WR" key is pressed ?
		BTFSS	STATUS,2	
		GOTO	MEMCH_DSP_10

		MOVF	MEM_CH,W		; Load Memory Channel data
		SUBLW	0AH				; 
		BTFSC	STATUS,2
		GOTO	MEMCH_DSP_30	; If Memory CH is "VFO", skip

		MOVF	WR_PHASE,W		; Load Writting phase
		SUBLW	01H				; Is the phase "Normal" ?
		BTFSS	STATUS,2
		GOTO	MEMCH_WR_10		; If not, next

		MOVLW	02H				; Proceed to Write phase 2
		MOVWF	WR_PHASE		;
		GOTO	MEMCH_DSP_30	; Processing each phase

MEMCH_WR_10
		MOVF	WR_PHASE,W		; Load Writting phase
		SUBLW	02H				; Is the phase "Frequency Adjesting" ?
		BTFSS	STATUS,2
		GOTO	MEMCH_WR_20		; If not, next
		
		MOVLW	03H				; Proceed to Write phase 3
		MOVWF	WR_PHASE		;
		GOTO	MEMCH_DSP_30	; Processing each phase

MEMCH_WR_20
		MOVF	WR_PHASE,W		; Load Writting phase
		SUBLW	03H				; Is the phase "Frequency Adjesting" ?
		BTFSS	STATUS,2
		GOTO	MEMCH_DSP_30	; If not, next
		
		MOVLW	01H				; Proceed to Write phase 1
		MOVWF	WR_PHASE		;
		GOTO	MEMCH_DSP_30	; If not, goto display
	
MEMCH_DSP_10
		MOVF	MEM_SEL, W		; Load Key data
		SUBLW	06H				; "UP" key is pressed ?
		BTFSS	STATUS,2
		GOTO	MEMCH_DSP_20	; Check next

		MOVF	MEM_CH,W		; Load current memory channel
		ADDLW	01H				; increment 
		MOVWF	MEM_CH			; Store data

		SUBLW	0BH				; Max valure ?
		BTFSS	STATUS,2		
		GOTO	MEMCH_DSP_30	; Goto display

		MOVLW	01H				; Back to Channel "1"
		MOVWF	MEM_CH
		GOTO	MEMCH_DSP_30	; Goto display

MEMCH_DSP_20
		MOVF	MEM_SEL, W		; Load Key data
		SUBLW	07H				; "DW" key is pressed ?
		BTFSS	STATUS,2
		GOTO	MEMCH_DSP_30	; Check next

		DECF	MEM_CH,1		; Decrement Memory channel data
		
		MOVF	MEM_CH,W		; Load again
		SUBLW	00H
		BTFSS	STATUS,2		
		GOTO	MEMCH_DSP_30	; Goto display

		MOVLW	0AH				; Back to Channel "VFO"
		MOVWF	MEM_CH
	
MEMCH_DSP_30
		MOVLW	00H				; Clear Key data
		MOVWF	MEM_SEL			

MEMCH_DSP_200
	
		MOVF	MEM_CH,W		; Load current memory channel
		SUBLW	01H				; Memory Channel is "1" ?
		BTFSS	STATUS,2		
		GOTO	MEMCH_DSP_210	; Compare to next character

		MOVF	WR_PHASE,W		; Check Memory write phase
		SUBLW	02H				; Phase 2 ?
		BTFSS	STATUS,2		; If not, just set memory channel
		GOTO	MEMCH_DSP_202	

		MOVLW	31H				; [1]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	43H				; [C]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2		
		MOVLW	48H				; [H]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [ ]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	57H				; [W]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0	
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2	
		MOVLW	52H				; [R]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
	
		GOTO	MEMCH_DSP_300	; Jump to the end process

MEMCH_DSP_202
		MOVF	WR_PHASE,W		; Check Memory write phase
		SUBLW	03H				; Phase 2 ?
		BTFSS	STATUS,2		; If not, just set memory channel
		GOTO	MEMCH_DSP_208

		MOVLW	31H				; [1]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0	
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	43H				; [C]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2		
		MOVLW	48H				; [H]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [ ]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [	]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [	]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2

		MOVF	BIN_L2,W		; Load current VFO Low byte
		BSF		STATUS,RP0		; Select register bank 1
		MOVWF	CH1_BIN_L		; Store data to CH1_BIN_L	
		BCF		STATUS,RP0		; Select register bank 1
		MOVF	BIN_H2,W		; Load current VFO High byte
		BSF		STATUS,RP0		; Select register bank 1
		MOVWF	CH1_BIN_H		; Store data to CH1_BIN_H
		BCF		STATUS,RP0		; Select register bank 1

		MOVLW	01H				; Move to Phase 1
		MOVWF	WR_PHASE		;	

		GOTO	MEMCH_DSP_300	; Jump to the end process

MEMCH_DSP_208
		MOVLW	31H				; [1]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	43H				; [C]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2		
		MOVLW	48H				; [H]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [ ]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [	]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [	]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
								
		BSF		STATUS,RP0		; Select register bank 1
		MOVF	CH1_BIN_L,W		; Restore frequency data
		BCF		STATUS,RP0		; Select register bank 1
		MOVWF	BIN_L2
		BSF		STATUS,RP0		; Select register bank 1
		MOVF	CH1_BIN_H,W	
		BCF		STATUS,RP0		; Select register bank 1	
		MOVWF	BIN_H2
		BSF		STATUS,RP0		; Select register bank 1
		MOVF	CH1_MD,W		; Restore mode data
		BCF		STATUS,RP0		; Select register bank 1
		MOVWF	Mode

		GOTO	MEMCH_DSP_300	; Jump to the end process

MEMCH_DSP_210

		MOVF	MEM_CH,W		; Load current memory channel
		SUBLW	02H				; Memory Channel is "2" ?
		BTFSS	STATUS,2		
		GOTO	MEMCH_DSP_220	; Compare to next character

		MOVF	WR_PHASE,W		; Check Memory write phase
		SUBLW	02H				; Phase 2 ?
		BTFSS	STATUS,2		; If not, just set memory channel
		GOTO	MEMCH_DSP_212	

		MOVLW	32H				; [2]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	43H				; [C]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2		
		MOVLW	48H				; [H]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [ ]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	57H				; [W]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	52H				; [R]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2

		GOTO	MEMCH_DSP_300	; Jump to the end process

MEMCH_DSP_212

		MOVF	WR_PHASE,W		; Check Memory write phase
		SUBLW	03H				; Phase 2 ?
		BTFSS	STATUS,2		; If not, just set memory channel
		GOTO	MEMCH_DSP_218

		MOVLW	32H				; [2]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	43H				; [C]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2		
		MOVLW	48H				; [H]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [ ]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [	]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [	]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2

		MOVF	BIN_L2,W		; Load current VFO Low byte
		BSF		STATUS,RP0		; Select register bank 1
		MOVWF	CH2_BIN_L		; Store data to CH2_BIN_L	
		BCF		STATUS,RP0		; Select register bank 1
		MOVF	BIN_H2,W		; Load current VFO High byte
		BSF		STATUS,RP0		; Select register bank 1
		MOVWF	CH2_BIN_H		; Store data to CH2_BIN_H
		BCF		STATUS,RP0		; Select register bank 1

		MOVLW	01H				; Move to Phase 1
		MOVWF	WR_PHASE		;	

		GOTO	MEMCH_DSP_300	; Jump to the end process

MEMCH_DSP_218

		MOVLW	32H				; [2]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	43H				; [C]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2		
		MOVLW	48H				; [H]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [ ]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [	]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [	]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2

		BSF		STATUS,RP0		; Select register bank 1
		MOVF	CH2_BIN_L,W		; Restore frequency data
		BCF		STATUS,RP0		; Select register bank 1
		MOVWF	BIN_L2
		BSF		STATUS,RP0		; Select register bank 1
		MOVF	CH2_BIN_H,W	
		BCF		STATUS,RP0		; Select register bank 1	
		MOVWF	BIN_H2
		BSF		STATUS,RP0		; Select register bank 1
		MOVF	CH2_MD,W		; Restore mode data
		BCF		STATUS,RP0		; Select register bank 1
		MOVWF	Mode

		GOTO	MEMCH_DSP_300	; Jump to the end process


MEMCH_DSP_220

		MOVF	MEM_CH,W		; Load current memory channel
		SUBLW	03H				; Memory Channel is "3" ?
		BTFSS	STATUS,2		
		GOTO	MEMCH_DSP_230	; Compare to next character

		MOVF	WR_PHASE,W		; Check Memory write phase
		SUBLW	02H				; Phase 2 ?
		BTFSS	STATUS,2		; If not, just set memory channel
		GOTO	MEMCH_DSP_222	

		MOVLW	33H				; [3]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	43H				; [C]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2		
		MOVLW	48H				; [H]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [ ]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	57H				; [W]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	52H				; [R]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2

		GOTO	MEMCH_DSP_300	; Jump to the end process

MEMCH_DSP_222
		MOVF	WR_PHASE,W		; Check Memory write phase
		SUBLW	03H				; Phase 2 ?
		BTFSS	STATUS,2		; If not, just set memory channel
		GOTO	MEMCH_DSP_228

		MOVLW	33H				; [3]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	43H				; [C]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2		
		MOVLW	48H				; [H]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [ ]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [	]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		MOVLW	20H				; [	]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2

		MOVF	BIN_L2,W		; Load current VFO Low byte
		BSF		STATUS,RP0		; Select register bank 1
		MOVWF	CH3_BIN_L		; Store data to CH3_BIN_L	
		BCF		STATUS,RP0		; Select register bank 1
		MOVF	BIN_H2,W		; Load current VFO High byte
		BSF		STATUS,RP0		; Select register bank 1
		MOVWF	CH3_BIN_H		; Store data to CH3_BIN_H
		BCF		STATUS,RP0		; Select register bank 1

		MOVLW	01H				; Move to Phase 1
		MOVWF	WR_PHASE		;	

		GOTO	MEMCH_DSP_300	; Jump to the end process

MEMCH_DSP_228

		MOVLW	33H				; [3]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	43H				; [C]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2		
		MOVLW	48H				; [H]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [ ]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [	]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [	]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2

		BSF		STATUS,RP0		; Select register bank 1
		MOVF	CH3_BIN_L,W		; Restore frequency data
		BCF		STATUS,RP0		; Select register bank 1
		MOVWF	BIN_L2
		BSF		STATUS,RP0		; Select register bank 1
		MOVF	CH3_BIN_H,W	
		BCF		STATUS,RP0		; Select register bank 1	
		MOVWF	BIN_H2
		BSF		STATUS,RP0		; Select register bank 1
		MOVF	CH3_MD,W		; Restore mode data
		BCF		STATUS,RP0		; Select register bank 1
		MOVWF	Mode

		GOTO	MEMCH_DSP_300	; Jump to the end process

MEMCH_DSP_230

		MOVF	MEM_CH,W		; Load current memory channel
		SUBLW	04H				; Memory Channel is "4" ?
		BTFSS	STATUS,2		
		GOTO	MEMCH_DSP_240	; Compare to next character

		MOVF	WR_PHASE,W		; Check Memory write phase
		SUBLW	02H				; Phase 2 ?
		BTFSS	STATUS,2		; If not, just set memory channel
		GOTO	MEMCH_DSP_232	

		MOVLW	34H				; [4]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	43H				; [C]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2		
		MOVLW	48H				; [H]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [ ]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	57H				; [W]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	52H				; [R]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2

		GOTO	MEMCH_DSP_300	; Jump to the end process

MEMCH_DSP_232
		MOVF	WR_PHASE,W		; Check Memory write phase
		SUBLW	03H				; Phase 2 ?
		BTFSS	STATUS,2		; If not, just set memory channel
		GOTO	MEMCH_DSP_238

		MOVLW	34H				; [4]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	43H				; [C]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2		
		MOVLW	48H				; [H]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [ ]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [	]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [	]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2

		MOVF	BIN_L2,W		; Load current VFO Low byte
		BSF		STATUS,RP0		; Select register bank 1
		MOVWF	CH4_BIN_L		; Store data to CH4_BIN_L	
		BCF		STATUS,RP0		; Select register bank 1
		MOVF	BIN_H2,W		; Load current VFO High byte
		BSF		STATUS,RP0		; Select register bank 1
		MOVWF	CH4_BIN_H		; Store data to CH4_BIN_H
		BCF		STATUS,RP0		; Select register bank 1

		MOVLW	01H				; Move to Phase 1
		MOVWF	WR_PHASE		;	

		GOTO	MEMCH_DSP_300	; Jump to the end process

MEMCH_DSP_238

		MOVLW	34H				; [4]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	43H				; [C]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2		
		MOVLW	48H				; [H]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2		
		MOVLW	20H				; [ ]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [	]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [	]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2

		BSF		STATUS,RP0		; Select register bank 1
		MOVF	CH4_BIN_L,W		; Restore frequency data
		BCF		STATUS,RP0		; Select register bank 1
		MOVWF	BIN_L2
		BSF		STATUS,RP0		; Select register bank 1
		MOVF	CH4_BIN_H,W	
		BCF		STATUS,RP0		; Select register bank 1	
		MOVWF	BIN_H2
		BSF		STATUS,RP0		; Select register bank 1
		MOVF	CH4_MD,W		; Restore mode data
		BCF		STATUS,RP0		; Select register bank 1
		MOVWF	Mode

		GOTO	MEMCH_DSP_300	; Jump to the end process

MEMCH_DSP_240

		MOVF	MEM_CH,W		; Load current memory channel
		SUBLW	05H				; Memory Channel is "5" ?
		BTFSS	STATUS,2		
		GOTO	MEMCH_DSP_250	; Compare to next character

		MOVF	WR_PHASE,W		; Check Memory write phase
		SUBLW	02H				; Phase 2 ?
		BTFSS	STATUS,2		; If not, just set memory channel
		GOTO	MEMCH_DSP_242	

		MOVLW	35H				; [5]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	43H				; [C]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2		
		MOVLW	48H				; [H]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [ ]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	57H				; [W]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	52H				; [R]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2

		GOTO	MEMCH_DSP_300	; Jump to the end process

MEMCH_DSP_242
		MOVF	WR_PHASE,W		; Check Memory write phase
		SUBLW	03H				; Phase 2 ?
		BTFSS	STATUS,2		; If not, just set memory channel
		GOTO	MEMCH_DSP_248

		MOVLW	35H				; [5]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	43H				; [C]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2		
		MOVLW	48H				; [H]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [ ]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [	]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [	]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2

		MOVF	BIN_L2,W		; Load current VFO Low byte
		BSF		STATUS,RP0		; Select register bank 1
		MOVWF	CH5_BIN_L		; Store data to CH4_BIN_L	
		BCF		STATUS,RP0		; Select register bank 1
		MOVF	BIN_H2,W		; Load current VFO High byte
		BSF		STATUS,RP0		; Select register bank 1
		MOVWF	CH5_BIN_H		; Store data to CH4_BIN_H
		BCF		STATUS,RP0		; Select register bank 1

		MOVLW	01H				; Move to Phase 1
		MOVWF	WR_PHASE		;		

		GOTO	MEMCH_DSP_300	; Jump to the end process		

MEMCH_DSP_248

		MOVLW	35H				; [5]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	43H				; [C]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2		
		MOVLW	48H				; [H]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2		
		MOVLW	20H				; [ ]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [	]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [	]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2

		BSF		STATUS,RP0		; Select register bank 1
		MOVF	CH5_BIN_L,W		; Restore frequency data
		BCF		STATUS,RP0		; Select register bank 1
		MOVWF	BIN_L2
		BSF		STATUS,RP0		; Select register bank 1
		MOVF	CH5_BIN_H,W	
		BCF		STATUS,RP0		; Select register bank 1	
		MOVWF	BIN_H2
		BSF		STATUS,RP0		; Select register bank 1
		MOVF	CH5_MD,W		; Restore mode data
		BCF		STATUS,RP0		; Select register bank 1
		MOVWF	Mode

		GOTO	MEMCH_DSP_300	; Jump to the end process

MEMCH_DSP_250

		MOVF	MEM_CH,W		; Load current memory channel
		SUBLW	06H				; Memory Channel is "6" ?
		BTFSS	STATUS,2		
		GOTO	MEMCH_DSP_260	; Compare to next character

		MOVF	WR_PHASE,W		; Check Memory write phase
		SUBLW	02H				; Phase 2 ?
		BTFSS	STATUS,2		; If not, just set memory channel
		GOTO	MEMCH_DSP_252	

		MOVLW	36H				; [6]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	43H				; [C]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2		
		MOVLW	48H				; [H]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [ ]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	57H				; [W]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	52H				; [R]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2

		GOTO	MEMCH_DSP_300	; Jump to the end process

MEMCH_DSP_252
		MOVF	WR_PHASE,W		; Check Memory write phase
		SUBLW	03H				; Phase 2 ?
		BTFSS	STATUS,2		; If not, just set memory channel
		GOTO	MEMCH_DSP_258

		MOVLW	36H				; [6]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	43H				; [C]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2		
		MOVLW	48H				; [H]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [ ]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [	]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [	]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2

		MOVF	BIN_L2,W		; Load current VFO Low byte
		BSF		STATUS,RP0		; Select register bank 1
		MOVWF	CH6_BIN_L		; Store data to CH4_BIN_L	
		BCF		STATUS,RP0		; Select register bank 1
		MOVF	BIN_H2,W		; Load current VFO High byte
		BSF		STATUS,RP0		; Select register bank 1
		MOVWF	CH6_BIN_H		; Store data to CH4_BIN_H
		BCF		STATUS,RP0		; Select register bank 1

		MOVLW	01H				; Move to Phase 1
		MOVWF	WR_PHASE		;	

		GOTO	MEMCH_DSP_300	; Jump to the end process
		
MEMCH_DSP_258
		MOVLW	36H				; [6]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	43H				; [C]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2		
		MOVLW	48H				; [H]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2		
		MOVLW	20H				; [ ]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [	]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [	]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2

		BSF		STATUS,RP0		; Select register bank 1
		MOVF	CH6_BIN_L,W		; Restore frequency data
		BCF		STATUS,RP0		; Select register bank 1
		MOVWF	BIN_L2
		BSF		STATUS,RP0		; Select register bank 1
		MOVF	CH6_BIN_H,W	
		BCF		STATUS,RP0		; Select register bank 1	
		MOVWF	BIN_H2
		BSF		STATUS,RP0		; Select register bank 1
		MOVF	CH6_MD,W		; Restore mode data
		BCF		STATUS,RP0		; Select register bank 1
		MOVWF	Mode

		GOTO	MEMCH_DSP_300	; Jump to the end process

MEMCH_DSP_260

		MOVF	MEM_CH,W		; Load current memory channel
		SUBLW	07H				; Memory Channel is "7" ?
		BTFSS	STATUS,2		
		GOTO	MEMCH_DSP_270	; Compare to next character

		MOVF	WR_PHASE,W		; Check Memory write phase
		SUBLW	02H				; Phase 2 ?
		BTFSS	STATUS,2		; If not, just set memory channel
		GOTO	MEMCH_DSP_262	

		MOVLW	37H				; [7]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	43H				; [C]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2		
		MOVLW	48H				; [H]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [ ]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	57H				; [W]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	52H				; [R]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2

		GOTO	MEMCH_DSP_300	; Jump to the end process

MEMCH_DSP_262
		MOVF	WR_PHASE,W		; Check Memory write phase
		SUBLW	03H				; Phase 2 ?
		BTFSS	STATUS,2		; If not, just set memory channel
		GOTO	MEMCH_DSP_268

		MOVLW	37H				; [7]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	43H				; [C]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2		
		MOVLW	48H				; [H]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [ ]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [	]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [	]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2

		MOVF	BIN_L2,W		; Load current VFO Low byte
		BSF		STATUS,RP0		; Select register bank 1
		MOVWF	CH7_BIN_L		; Store data to CH4_BIN_L	
		BCF		STATUS,RP0		; Select register bank 1
		MOVF	BIN_H2,W		; Load current VFO High byte
		BSF		STATUS,RP0		; Select register bank 1
		MOVWF	CH7_BIN_H		; Store data to CH4_BIN_H
		BCF		STATUS,RP0		; Select register bank 1

		MOVLW	01H				; Move to Phase 1
		MOVWF	WR_PHASE		;	

		GOTO	MEMCH_DSP_300	; Jump to the end process

MEMCH_DSP_268
		MOVLW	37H				; [7]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	43H				; [C]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2		
		MOVLW	48H				; [H]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2		
		MOVLW	20H				; [ ]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [	]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [	]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2

		BSF		STATUS,RP0		; Select register bank 1
		MOVF	CH7_BIN_L,W		; Restore frequency data
		BCF		STATUS,RP0		; Select register bank 1
		MOVWF	BIN_L2
		BSF		STATUS,RP0		; Select register bank 1
		MOVF	CH7_BIN_H,W	
		BCF		STATUS,RP0		; Select register bank 1	
		MOVWF	BIN_H2
		BSF		STATUS,RP0		; Select register bank 1
		MOVF	CH7_MD,W		; Restore mode data
		BCF		STATUS,RP0		; Select register bank 1
		MOVWF	Mode

		GOTO	MEMCH_DSP_300	; Jump to the end process

MEMCH_DSP_270

		MOVF	MEM_CH,W		; Load current memory channel
		SUBLW	08H				; Memory Channel is "8" ?
		BTFSS	STATUS,2		
		GOTO	MEMCH_DSP_280	; Compare to next character

		MOVF	WR_PHASE,W		; Check Memory write phase
		SUBLW	02H				; Phase 2 ?
		BTFSS	STATUS,2		; If not, just set memory channel
		GOTO	MEMCH_DSP_272	

		MOVLW	38H				; [8]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	43H				; [C]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2		
		MOVLW	48H				; [H]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [ ]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	57H				; [W]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	52H				; [R]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2

		GOTO	MEMCH_DSP_300	; Jump to the end process

MEMCH_DSP_272

		MOVF	WR_PHASE,W		; Check Memory write phase
		SUBLW	03H				; Phase 2 ?
		BTFSS	STATUS,2		; If not, just set memory channel
		GOTO	MEMCH_DSP_278

		MOVLW	38H				; [8]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	43H				; [C]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2		
		MOVLW	48H				; [H]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [ ]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [	]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [	]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2

		MOVF	BIN_L2,W		; Load current VFO Low byte
		BSF		STATUS,RP0		; Select register bank 1
		MOVWF	CH8_BIN_L		; Store data to CH4_BIN_L	
		BCF		STATUS,RP0		; Select register bank 1
		MOVF	BIN_H2,W		; Load current VFO High byte
		BSF		STATUS,RP0		; Select register bank 1
		MOVWF	CH8_BIN_H		; Store data to CH4_BIN_H
		BCF		STATUS,RP0		; Select register bank 1

		MOVLW	01H				; Move to Phase 1
		MOVWF	WR_PHASE		;	

		GOTO	MEMCH_DSP_300	; Jump to the end process

MEMCH_DSP_278

		MOVLW	38H				; [8]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	43H				; [C]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2		
		MOVLW	48H				; [H]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2		
		MOVLW	20H				; [ ]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [	]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [	]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2

		BSF		STATUS,RP0		; Select register bank 1
		MOVF	CH8_BIN_L,W		; Restore frequency data
		BCF		STATUS,RP0		; Select register bank 1
		MOVWF	BIN_L2
		BSF		STATUS,RP0		; Select register bank 1
		MOVF	CH8_BIN_H,W	
		BCF		STATUS,RP0		; Select register bank 1	
		MOVWF	BIN_H2
		BSF		STATUS,RP0		; Select register bank 1
		MOVF	CH8_MD,W		; Restore mode data
		BCF		STATUS,RP0		; Select register bank 1
		MOVWF	Mode

		GOTO	MEMCH_DSP_300	; Jump to the end process

MEMCH_DSP_280

		MOVF	MEM_CH,W		; Load current memory channel
		SUBLW	09H				; Memory Channel is "9" ?
		BTFSS	STATUS,2		
		GOTO	MEMCH_DSP_290	; Compare to next character

		MOVF	WR_PHASE,W		; Check Memory write phase
		SUBLW	02H				; Phase 2 ?
		BTFSS	STATUS,2		; If not, just set memory channel
		GOTO	MEMCH_DSP_282	

		MOVLW	39H				; [9]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	43H				; [C]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2		
		MOVLW	48H				; [H]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [ ]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	57H				; [W]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	52H				; [R]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2

		GOTO	MEMCH_DSP_300	; Jump to the end process

MEMCH_DSP_282

		MOVF	WR_PHASE,W		; Check Memory write phase
		SUBLW	03H				; Phase 2 ?
		BTFSS	STATUS,2		; If not, just set memory channel
		GOTO	MEMCH_DSP_288

		MOVLW	39H				; [9]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	43H				; [C]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2		
		MOVLW	48H				; [H]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [ ]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [	]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [	]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2

		MOVF	BIN_L2,W		; Load current VFO Low byte
		BSF		STATUS,RP0		; Select register bank 1
		MOVWF	CH9_BIN_L		; Store data to CH4_BIN_L	
		BCF		STATUS,RP0		; Select register bank 1
		MOVF	BIN_H2,W		; Load current VFO High byte
		BSF		STATUS,RP0		; Select register bank 1
		MOVWF	CH9_BIN_H		; Store data to CH4_BIN_H
		BCF		STATUS,RP0		; Select register bank 1

		MOVLW	01H				; Move to Phase 1
		MOVWF	WR_PHASE		;	

		GOTO	MEMCH_DSP_300	; Jump to the end process

MEMCH_DSP_288

		MOVLW	39H				; [9]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	43H				; [C]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2		
		MOVLW	48H				; [H]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2		
		MOVLW	20H				; [ ]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [	]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	20H				; [	]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		BSF		STATUS,RP0		; Select register bank 1
		MOVF	CH9_BIN_L,W		; Restore frequency data
		BCF		STATUS,RP0		; Select register bank 1
		MOVWF	BIN_L2
		BSF		STATUS,RP0		; Select register bank 1
		MOVF	CH9_BIN_H,W	
		BCF		STATUS,RP0		; Select register bank 1	
		MOVWF	BIN_H2
		BSF		STATUS,RP0		; Select register bank 1
		MOVF	CH9_MD,W		; Restore mode data
		BCF		STATUS,RP0		; Select register bank 1
		MOVWF	Mode

		GOTO	MEMCH_DSP_300	; Jump to the end process

MEMCH_DSP_290

		MOVF	MEM_CH,W		; Load current memory channel
		SUBLW	0AH				; Memory Channel is "VFO" ?
		BTFSS	STATUS,2		
		GOTO	MEMCH_DSP_300	; Compare to next character

		MOVLW	56H				; [V]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2
		MOVLW	46H				; [F]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2		
		MOVLW	4FH				; [O]
		MOVWF	LCD_CHR
		BCF		PCLATH,4		; Page 0
		CALL	LCD_CHR_WR_R
		BSF		PCLATH,4		; Page 2

MEMCH_DSP_300
	
		BCF		PCLATH,4		; Page 0
		CALL	Freq_Change		; Frequency Change
		BSF		PCLATH,4		; Page 2
		MOVLW	71H				; Set "MEM" address in RAM to EEPROM writing
		BANKSEL	EEADR
		MOVWF	EE_ADDR	
		BANKSEL	PIR1		
		MOVF	MEM_CH,W		; Set "Mode" address in RAM to EEPROM writing
		BANKSEL	EEDATA
		MOVWF	EE_DATA

		BSF		PCLATH,3		; Select Page 1
		BCF		PCLATH,4		; Page 0
		CALL	EEP_WR
		CALL	EEP_MEM_WR		; Memory frequency data writing to EEPROM
		BCF		PCLATH,3		; Back to Page 0
		BSF		PCLATH,4		; Page 2
		BANKSEL	PIR1	
		RETURN




;********************************************************************
  ORG 1C00H
;---------- Small Character data ------------------

CHR_   ; Data 00-05H

;	ADDWF    PCL,F

	RETLW   0x00
	RETLW   0x00
	RETLW   0x00
	RETLW   0x00
	RETLW   0x00
	RETLW   0x00

CHR_A   ; Data 06-0BH

;	ADDWF    PCL,F

	RETLW	00H			
	RETLW	0C0H
	RETLW   38H
	RETLW   26H
	RETLW	38H
	RETLW   0C0H

CHR_B   ; Data 0CH-11H

;	ADDWF    PCL,F

	RETLW   0x00
	RETLW   0xFE
	RETLW   0x92
	RETLW   0x92
	RETLW   0x92
	RETLW   0x6C

CHR_C    ; Data 12H-17H

;	ADDWF    PCL,F

	RETLW   0x00
	RETLW   0x7C
	RETLW   0x82
	RETLW   0x82
	RETLW   0x82
	RETLW   0x44

CHR_D     ; Data 18-1DH

;	ADDWF    PCL,F

	RETLW   0x00
	RETLW   0xFE
	RETLW   0x82
	RETLW   0x82
	RETLW   0x44
	RETLW   0x38

CHR_E      ; Data 1E-23H

;	ADDWF    PCL,F

	RETLW   0x00
	RETLW   0xFE
	RETLW   0x92
	RETLW   0x92
	RETLW   0x92
	RETLW   0x82

CHR_F     ; Data 24-29H

;	ADDWF    PCL,F

	RETLW   0x00
	RETLW   0xFE
	RETLW   0x12
	RETLW   0x12
	RETLW   0x12
	RETLW   0x02

CHR_G    ; Data 2A-2FH

;	ADDWF    PCL,F

	RETLW   0x00
	RETLW   0x7C
	RETLW   0x82
	RETLW   0xA2
	RETLW   0xA2
	RETLW   0x64

CHR_H    ; Data 30-35H

;	ADDWF    PCL,F

	RETLW   0x00
	RETLW   0xFE
	RETLW   0x10
	RETLW   0x10
	RETLW   0x10
	RETLW   0xFE

CHR_I  ; Data 36-3BH

;	ADDWF    PCL,F

	RETLW   0x00
	RETLW   0x00
	RETLW   0x82
	RETLW   0xFE
	RETLW   0x82
	RETLW   0x00

CHR_J   ; Data 3C-41H

;	ADDWF    PCL,F

	RETLW   0x00
	RETLW   0x42
	RETLW   0x82
	RETLW   0x7E
	RETLW   0x02
	RETLW   0x02

CHR_K   ; Data 42-47H

;	ADDWF    PCL,F

	RETLW   0x00
	RETLW   0xFE
	RETLW   0x10
	RETLW   0x28
	RETLW   0x44
	RETLW   0x82

CHR_L   ; Data 48-4DH

;	ADDWF    PCL,F

	RETLW   0x00
	RETLW   0xFE
	RETLW   0x80
	RETLW   0x80
	RETLW   0x80
	RETLW   0x80

CHR_M    ; Data 4E-53H

;	ADDWF    PCL,F

	RETLW   0x00
	RETLW   0xFE
	RETLW   0x0C
	RETLW   0x10
	RETLW   0x0C
	RETLW   0xFE

CHR_N    ; Data 54-59H

;	ADDWF    PCL,F

	RETLW   0x00
	RETLW   0xFE
	RETLW   0x04
	RETLW   0x18
	RETLW   0x60
	RETLW   0xFE

CHR_O    ; Data 5A-5FH

;	ADDWF    PCL,F

	RETLW   0x00
	RETLW   0x7C
	RETLW   0x82
	RETLW   0x82
	RETLW   0x82
	RETLW   0x7C

CHR_P    ; Data 60-65H

;	ADDWF    PCL,F

	RETLW   0x00
	RETLW   0xFE
	RETLW   0x12
	RETLW   0x12
	RETLW   0x12
	RETLW   0x0C

CHR_Q   ; Data 66-6BH

;	ADDWF    PCL,F

	RETLW   0x00
	RETLW   0x7C
	RETLW   0x82
	RETLW   0xA2
	RETLW   0xC2
	RETLW   0xFC

CHR_R   ; Data 6C-71H

;	ADDWF    PCL,F

	RETLW   0x00
	RETLW   0xFE
	RETLW   0x32
	RETLW   0x52
	RETLW   0x52
	RETLW   0x8C

CHR_S   ; Data 72-77H

;	ADDWF    PCL,F

	RETLW   0x00
	RETLW   0x4C
	RETLW   0x92
	RETLW   0x92
	RETLW   0x92
	RETLW   0x64

CHR_T   ; Data 78-7DH

;	ADDWF    PCL,F

	RETLW   0x00
	RETLW   0x02
	RETLW   0x02
	RETLW   0xFE
	RETLW   0x02
	RETLW   0x02

CHR_U    ; Data 7E-83H

;	ADDWF    PCL,F

	RETLW   0x00
	RETLW   0x7E
	RETLW   0x80
	RETLW   0x80
	RETLW   0x80
	RETLW   0x7E

CHR_V    ; Data 84-89H

;	ADDWF    PCL,F

	RETLW   0x00
	RETLW   0x06
	RETLW   0x38
	RETLW   0xC0
	RETLW   0x38
	RETLW   0x06

CHR_W     ; Data 8A-8FH

;	ADDWF    PCL,F

	RETLW   0x00
	RETLW   0x3E
	RETLW   0xC0
	RETLW   0x38
	RETLW   0xC0
	RETLW   0x3E

CHR_X     ; Data 90-95H

;	ADDWF    PCL,F

	RETLW   0x00
	RETLW   0x82
	RETLW   0x6C
	RETLW   0x10
	RETLW   0x6C
	RETLW   0x82

CHR_Y     ; Data 96-9BH

;	ADDWF    PCL,F

	RETLW   0x00
	RETLW   0x02
	RETLW   0x04
	RETLW   0xF8
	RETLW   0x04
	RETLW   0x02

CHR_Z    ; Data 9C-A1H

;	ADDWF    PCL,F

	RETLW   0x00
	RETLW   0x82
	RETLW   0xEA
	RETLW   0x92
	RETLW   0xAE
	RETLW   0x82

CHR_1    ; Data A2-A7H

;	ADDWF    PCL,F

	RETLW   0x00
	RETLW   0x04
	RETLW   0x04
	RETLW   0xFE
	RETLW   0x00
	RETLW   0x00
	
CHR_2    ; Data A8-ADH

;	ADDWF    PCL,F

	RETLW   0x00
	RETLW   0x84
	RETLW   0xC2
	RETLW   0xA2
	RETLW   0x9C
	RETLW   0x80

CHR_3   ; Data AE-B2H

;	ADDWF    PCL,F

	RETLW	0x00
	RETLW   0x44
	RETLW   0x82
	RETLW   0x92
	RETLW   0x92
	RETLW   0x6C

CHR_4   ; Data B3-B8H

;	ADDWF    PCL,F

	RETLW   0x00
	RETLW   0x30
	RETLW   0x2C
	RETLW   0xFE
	RETLW   0x20
	RETLW   0x20

CHR_5  ; Data B9-BEH

;	ADDWF    PCL,F

	RETLW   0x00
	RETLW   0x9E
	RETLW   0x94
	RETLW   0x94
	RETLW   0x64
	RETLW	0x00

CHR_6   ; Data BF-C4H

;	ADDWF    PCL,F

	RETLW   0x00
	RETLW   0x7C
	RETLW   0x92
	RETLW   0x92
	RETLW   0x92
	RETLW   0x64

CHR_7    ; Data C5-CAH

;	ADDWF    PCL,F

	RETLW   0x00
	RETLW   0x06
	RETLW   0x02
	RETLW   0xC2
	RETLW   0x3A
	RETLW   0x06

CHR_8    ; Data CB-C0H

;	ADDWF    PCL,F

	RETLW   0x00
	RETLW   0x6C
	RETLW   0x92
	RETLW   0x92
	RETLW   0x92
	RETLW   0x6C

CHR_9    ; Data D1-D6H

;	ADDWF    PCL,F

	RETLW   0x00
	RETLW   0x4C
	RETLW   0x92
	RETLW   0x92
	RETLW   0x92
	RETLW   0x7C

CHR_0     ; D7-DCH

;	ADDWF    PCL,F

	RETLW   0x00
	RETLW   0x7C
	RETLW   0xC2
	RETLW   0xBA
	RETLW   0x86
	RETLW   0x7C

CHR_DC			; [!] DD-E2H

;	ADDWF    PCL,F

	RETLW   0x00
	RETLW   0x00
	RETLW   0xDF
	RETLW   0x00
	RETLW   0x00
	RETLW   0x00

CHR_QE			;[?]   E3-E8H

;	ADDWF    PCL,F

	RETLW   0x06
	RETLW   0x01
	RETLW   0xB9
	RETLW   0x09
	RETLW   0x06
	RETLW   0x00

CHR_EQ		;[=]  E9-EEH

;	ADDWF    PCL,F

	RETLW   0x00
	RETLW   0x24
	RETLW   0x24
	RETLW   0x24
	RETLW   0x24
	RETLW   0x00

CHR_AS		;[AS]   EF-F4H

;	ADDWF    PCL,F

	RETLW   0x2A
	RETLW   0x1C
	RETLW   0x7F
	RETLW   0x1C
	RETLW   0x2A
	RETLW   0x00

CHR_SL		;[/]  F5-FAH

;	ADDWF    PCL,F

	RETLW   0x00
	RETLW   0x20
	RETLW   0x10
	RETLW   0x08
	RETLW   0x04
	RETLW   0x02

CHR_PR		;[.]  FB-00H

;	ADDWF    PCL,F

	RETLW   0x00
	RETLW   0x00
	RETLW   0x40
	RETLW   0x00
	RETLW   0x00
	RETLW   0x00

  ORG 1D90H
;---------- The table of the 1st Segment Large degit " "----------
DZS1
		RETLW	0x00		;Line 1
		RETLW	0x00		;Line 2
		RETLW	0x00		;Line 3
		RETLW	0x00		;Line 4
		RETLW	0x00		;Line 5
		RETLW	0x00		;Line 6
		RETLW	0x00		;Line 7
		RETLW	0x00		;Line 8
		RETLW	0x00		;Line 9
		RETLW	0x00		;Line 10
		RETLW	0x00		;Line 11
		RETLW	0x00		;Line 12
		RETLW	0x00		;Line 13	
		RETLW	0x00		;Line 14
		RETLW	0x00		;Line 15
		RETLW	0x00		;Line 16

;---------- The table of the 2nd Segment Large degit " "----------
DZS2
		RETLW	0x00		;Line 1
		RETLW	0x00		;Line 2
		RETLW	0x00		;Line 3
		RETLW	0x00		;Line 4
		RETLW	0x00		;Line 5
		RETLW	0x00		;Line 6
		RETLW	0x00		;Line 7
		RETLW	0x00		;Line 8
		RETLW	0x00		;Line 9
		RETLW	0x00		;Line 10
		RETLW	0x00		;Line 11
		RETLW	0x00		;Line 12
		RETLW	0x00		;Line 13
		RETLW	0x00		;Line 14	
		RETLW	0x00		;Line 15
		RETLW	0x00		;Line 16

;---------- The table of the 3rd Segment Large degit " "----------
DZS3
		RETLW	0x00		;Line 1
		RETLW	0x00		;Line 2
		RETLW	0x00		;Line 3
		RETLW	0x00		;Line 4
		RETLW	0x00		;Line 5
		RETLW	0x00		;Line 6
		RETLW	0x00		;Line 7
		RETLW	0x00		;Line 8
		RETLW	0x00		;Line 9
		RETLW	0x00		;Line 10
		RETLW	0x00		;Line 11
		RETLW	0x00		;Line 12
		RETLW	0x00		;Line 13	
		RETLW	0x00		;Line 14
		RETLW	0x00		;Line 15
		RETLW	0x00		;Line 16


;---------- The table of the 1st Segment Large degit "."----------
DSS1
		RETLW	0x00		;Line 1
		RETLW	0x00		;Line 2
		RETLW	0x00		;Line 3
		RETLW	0x00		;Line 4
		RETLW	0x00		;Line 5
		RETLW	0x00		;Line 6
		RETLW	0x00		;Line 7
		RETLW	0x00		;Line 8
		RETLW	0x00		;Line 9
		RETLW	0x00		;Line 10
		RETLW	0x00		;Line 11
		RETLW	0x00		;Line 12
		RETLW	0x00		;Line 13	
		RETLW	0x00		;Line 14
		RETLW	0x00		;Line 15
		RETLW	0x00		;Line 16

;---------- The table of the 2nd Segment Large degit "."----------
DSS2
		RETLW	0x00		;Line 1
		RETLW	0x00		;Line 2
		RETLW	0x00		;Line 3
		RETLW	0x00		;Line 4
		RETLW	0x00		;Line 5
		RETLW	0x00		;Line 6
		RETLW	0x00		;Line 7
		RETLW	0x00		;Line 8
		RETLW	0x00		;Line 9
		RETLW	0x00		;Line 10
		RETLW	0x00		;Line 11
		RETLW	0x00		;Line 12
		RETLW	0x00		;Line 13
		RETLW	0x00		;Line 14	
		RETLW	0x00		;Line 15
		RETLW	0x00		;Line 16

;---------- The table of the 3rd Segment Large degit "."----------
DSS3
		RETLW	0x00		;Line 1
		RETLW	0x00		;Line 2
		RETLW	0x00		;Line 3
		RETLW	0x00		;Line 4
		RETLW	0x00		;Line 5
		RETLW	0x3E		;Line 6
		RETLW	0x3E		;Line 7
		RETLW	0x3E		;Line 8
		RETLW	0x3E		;Line 9
		RETLW	0x3E		;Line 10
		RETLW	0x00		;Line 11
		RETLW	0x00		;Line 12
		RETLW	0x00		;Line 13	
		RETLW	0x00		;Line 14
		RETLW	0x00		;Line 15
		RETLW	0x00		;Line 16

 ORG	1E00H
;---------- The table of the first Segment Large degit "1"----------
D1S1
		RETLW	0x00		;Line 1
		RETLW	0x00		;Linw 2
		RETLW	0x00		;Linw 3
		RETLW	0xF0		;Line 4
		RETLW	0xF8		;Line 5
		RETLW	0xFC		;Line 6
		RETLW	0xFE		;Line 7
		RETLW	0xFE		;Line 8
		RETLW	0xFE		;Line 9
		RETLW	0xFE		;Line 10
 		RETLW	0xFE		;Line 11
		RETLW	0x00		;Line 12
		RETLW	0x00		;Line 13	
		RETLW	0x00		;Line 14
		RETLW	0x00		;Line 15
		RETLW	0x00		;Line 16
		
;---------- The table of the 2nd Segment Large degit "1"----------
D1S2
		RETLW	0x00		;Line 1
		RETLW	0x00		;Linw 2
		RETLW	0x00		;Line 3
		RETLW	0x00		;Line 4
		RETLW	0x00		;Line 5
		RETLW	0x00		;Line 6
		RETLW	0xFF		;Line 7
		RETLW	0xFF		;Line 8
		RETLW	0xFF		;Line 9
 		RETLW	0xFF		;Line 10
		RETLW	0xFF		;Line 11
		RETLW	0x00		;Line 12	
		RETLW	0x00		;Line 13
		RETLW	0x00		;Line 14
		RETLW	0x00		;Line 15
		RETLW	0x00		;Line 16

;---------- The table of the 3rd Segment Large degit "1"----------
D1S3
		RETLW	0x00		;Line 1
		RETLW	0x00		;Linw 2
		RETLW	0x00		;Line 3
		RETLW	0x00		;Line 4
		RETLW	0x00		;Line 5
		RETLW	0x00		;Line 6
		RETLW	0x7F		;Line 7
		RETLW	0x7F		;Line 8
		RETLW	0x7F		;Line 9
 		RETLW	0x7F		;Line 10
		RETLW	0x7F		;Line 11
		RETLW	0x00		;Line 12	
		RETLW	0x00		;Line 13
		RETLW	0x00		;Line 14
		RETLW	0x00		;Line 15
		RETLW	0x00		;Line 16

;---------- The table of the 3rd Segment Large degit "2"----------
D2S1
		RETLW	0x00		;Line 1
		RETLW	0x00		;Line 2
		RETLW	0x3C		;Line 3
		RETLW	0x3E		;Line 4
		RETLW	0x1E		;Line 5
		RETLW	0x1E		;Line 6
		RETLW	0x1E		;Line 7
		RETLW	0x1E		;Line 8
		RETLW	0x3E		;Line 9
		RETLW	0xFE		;Line 10
 		RETLW	0xFE		;Line 11
		RETLW	0xFE		;Line 12
		RETLW	0xFC		;Line 13	
		RETLW	0xFC		;Line 14
		RETLW	0xF8		;Line 15
		RETLW	0x00		;Line 16

;---------- The table of the 2nd Segment Large degit "2"----------
D2S2
		RETLW	0x00		;Line 1
		RETLW	0x00		;Line 2
		RETLW	0x00		;Line 3
		RETLW	0x00		;Line 4
		RETLW	0x80		;Line 5
		RETLW	0xC0		;Line 6
		RETLW	0xE0		;Line 7
		RETLW	0xF8		;Line 8
		RETLW	0xFC		;Line 9
		RETLW	0xFF		;Line 10
		RETLW	0x7F		;Line 11
 		RETLW	0x3F		;Line 12
		RETLW	0x1F		;Line 13	
		RETLW	0x0F		;Line 14
		RETLW	0x07		;Line 15
		RETLW	0x00		;Line 16

;---------- The table of the 3rd Segment Large degit "2"----------
D2S3
		RETLW	0x00		;Line 1
		RETLW	0x7E		;Line 2
		RETLW	0x7F		;Line 3
		RETLW	0x7F		;Line 4
		RETLW	0x7F		;Line 5
		RETLW	0x7F		;Line 6
		RETLW	0x7F		;Line 7
		RETLW	0x7B		;Line 8
		RETLW	0x79		;Line 9
		RETLW	0x78		;Line 10
		RETLW	0x78		;Line 11
 		RETLW	0x78		;Line 12
		RETLW	0x78		;Line 13	
		RETLW	0x78		;Line 14
		RETLW	0x78		;Line 15
		RETLW	0x00		;Line 16

;---------- The table of the 3rd Segment Large degit "3"----------
D3S1
		RETLW	0x00		;Line 1
		RETLW	0x00		;Line 2
		RETLW	0x38		;Line 3
		RETLW	0x3C		;Line 4
		RETLW	0x3E		;Line 5
		RETLW	0x3E		;Line 6
		RETLW	0x3E		;Line 7
		RETLW	0x3E		;Line 8
		RETLW	0x3E		;Line 9
		RETLW	0xFE		;Line 10
 		RETLW	0xFE		;Line 11
		RETLW	0xFC		;Line 12
		RETLW	0xFC		;Line 13	
		RETLW	0xF8		;Line 14
		RETLW	0xF0		;Line 15
		RETLW	0x00		;Line 16

;---------- The table of the 2nd Segment Large degit "3"----------
D3S2
		RETLW	0x00		;Line 1
		RETLW	0x00		;Line 2
		RETLW	0x00		;Line 3
		RETLW	0x00		;Line 4
		RETLW	0x3C		;Line 5
		RETLW	0x3C		;Line 6
		RETLW	0x3C		;Line 7
		RETLW	0x3E		;Line 8
		RETLW	0x7E		;Line 9
		RETLW	0xFF		;Line 10
		RETLW	0xFF		;Line 11
 		RETLW	0xE7		;Line 12
		RETLW	0xC3		;Line 13	
		RETLW	0x81		;Line 14
		RETLW	0x00		;Line 15
		RETLW	0x00		;Line 16

;---------- The table of the 3rd Segment Large degit "3"----------
D3S3
		RETLW	0x00		;Line 1
		RETLW	0x3C		;Line 2
		RETLW	0x7C		;Line 3
		RETLW	0x78		;Line 4
		RETLW	0xF8		;Line 5
		RETLW	0xF8		;Line 6
		RETLW	0xF8		;Line 7
		RETLW	0xF8		;Line 8
		RETLW	0xF8		;Line 9
		RETLW	0xFC		;Line 10
		RETLW	0xFF		;Line 11
 		RETLW	0x7F		;Line 12
		RETLW	0x3F		;Line 13	
		RETLW	0x1F		;Line 14
		RETLW	0x0F		;Line 15
		RETLW	0x00		;Line 16

;---------- The table of the 3rd Segment Large degit "4"----------
D4S1
		RETLW	0x00		;Line 1
		RETLW	0x00		;Line 2
		RETLW	0x00		;Line 3
		RETLW	0x00		;Line 4
		RETLW	0x80		;Line 5
		RETLW	0xC0		;Line 6
		RETLW	0xE0		;Line 7
		RETLW	0xF8		;Line 8
		RETLW	0x7E		;Line 9
		RETLW	0xFE		;Line 10
 		RETLW	0xFE		;Line 11
		RETLW	0xFE		;Line 12
		RETLW	0xFE		;Line 13	
		RETLW	0x00		;Line 14
		RETLW	0x00		;Line 15
		RETLW	0x00		;Line 16

;---------- The table of the 2nd Segment Large degit "4"----------
D4S2
		RETLW	0x00		;Line 1
		RETLW	0xF8		;Line 2
		RETLW	0xFC		;Line 3
		RETLW	0xFE		;Line 4
		RETLW	0xFF		;Line 5
		RETLW	0xEF		;Line 6
		RETLW	0xE7		;Line 7
		RETLW	0xE1		;Line 8
		RETLW	0xE0		;Line 9
		RETLW	0xFF		;Line 10
		RETLW	0xFF		;Line 11
 		RETLW	0xFF		;Line 12
		RETLW	0xFF		;Line 13	
		RETLW	0xE0		;Line 14
		RETLW	0xE0		;Line 15
		RETLW	0x00		;Line 16

;---------- The table of the 3rd Segment Large degit "4"----------
D4S3
		RETLW	0x00		;Line 1
		RETLW	0x03		;Line 2
		RETLW	0x03		;Line 3
		RETLW	0x03		;Line 4
		RETLW	0x03		;Line 5
		RETLW	0x03		;Line 6
		RETLW	0x03		;Line 7
		RETLW	0x03		;Line 8
		RETLW	0x7F		;Line 9
		RETLW	0x7F		;Line 10
		RETLW	0x7F		;Line 11
 		RETLW	0x7F		;Line 12
		RETLW	0x7F		;Line 13	
		RETLW	0x03		;Line 14
		RETLW	0x03		;Line 15
		RETLW	0x00		;Line 16

;---------- The table of the 3rd Segment Large degit "5"----------
D5S1
		RETLW	0x00		;Line 1
		RETLW	0xFE		;Line 2
		RETLW	0xFE		;Line 3
		RETLW	0xFE		;Line 4
		RETLW	0xFE		;Line 5
		RETLW	0xFE		;Line 6
		RETLW	0xFE		;Line 7
		RETLW	0x3E		;Line 8
		RETLW	0x3E		;Line 9
		RETLW	0x3E		;Line 10
 		RETLW	0x3E		;Line 11
		RETLW	0x3E		;Line 12
		RETLW	0x3E		;Line 13	
		RETLW	0x3E		;Line 14
		RETLW	0x3E		;Line 15
		RETLW	0x00		;Line 16

;---------- The table of the 2nd Segment Large degit "5"----------
D5S2
		RETLW	0x00		;Line 1
		RETLW	0x3F		;Line 2
		RETLW	0x1F		;Line 3
		RETLW	0x1F		;Line 4
		RETLW	0x1F		;Line 5
		RETLW	0x1F		;Line 6
		RETLW	0x1F		;Line 7
		RETLW	0x1E		;Line 8
		RETLW	0x3E		;Line 9
		RETLW	0xFE		;Line 10
		RETLW	0xFC		;Line 11
		RETLW	0xFC		;Line 12
 		RETLW	0xF8		;Line 13
		RETLW	0xF0		;Line 14	
		RETLW	0xE0		;Line 15
		RETLW	0x00		;Line 16

;---------- The table of the 3rd Segment Large degit "5"----------
D5S3
		RETLW	0x00		;Line 1
		RETLW	0x7C		;Line 2
		RETLW	0x7C		;Line 3
		RETLW	0x7C		;Line 4
		RETLW	0x7C		;Line 5
		RETLW	0x7C		;Line 6
		RETLW	0x7C		;Line 7
		RETLW	0x7E		;Line 8
		RETLW	0x7F		;Line 9
		RETLW	0x7F		;Line 10
		RETLW	0x7F		;Line 11
 		RETLW	0x3F		;Line 12
		RETLW	0x1F		;Line 13	
		RETLW	0x0F		;Line 14
		RETLW	0x07		;Line 15
		RETLW	0x00		;Line 16

ORG 1F00H

;---------- The table of the 3rd Segment Large degit "6"----------
D6S1
		RETLW	0x00		;Line 1
		RETLW	0x00		;Line 2
		RETLW	0xC0		;Line 3
		RETLW	0xF0		;Line 4
		RETLW	0xF8		;Line 5
		RETLW	0xFE		;Line 6
		RETLW	0xFE		;Line 7
		RETLW	0xFE		;Line 8
		RETLW	0x3E		;Line 9
		RETLW	0x0E		;Line 10
 		RETLW	0x06		;Line 11
		RETLW	0x02		;Line 12
		RETLW	0x00		;Line 13	
		RETLW	0x00		;Line 14
		RETLW	0x00		;Line 15
		RETLW	0x00		;Line 16

;---------- The table of the 2nd Segment Large degit "6"----------
D6S2
		RETLW	0x00		;Line 1
		RETLW	0xFF		;Line 2
		RETLW	0xFF		;Line 3
		RETLW	0xFF		;Line 4
		RETLW	0xFF		;Line 5
		RETLW	0x1F		;Line 6
		RETLW	0x03		;Line 7
		RETLW	0x18		;Line 8
		RETLW	0x1C		;Line 9
		RETLW	0x1E		;Line 10
		RETLW	0xFE		;Line 11
		RETLW	0xFE		;Line 12
 		RETLW	0xFC		;Line 13
		RETLW	0xF8		;Line 14	
		RETLW	0xF0		;Line 15
		RETLW	0x00		;Line 16

;---------- The table of the 3rd Segment Large degit "6"----------
D6S3
		RETLW	0x00		;Line 1
		RETLW	0x0F		;Line 2
		RETLW	0x1F		;Line 3
		RETLW	0x3F		;Line 4
		RETLW	0x7F		;Line 5
		RETLW	0x7E		;Line 6
		RETLW	0x7C		;Line 7
		RETLW	0x7C		;Line 8
		RETLW	0x7C		;Line 9
		RETLW	0x7E		;Line 10
		RETLW	0x3F		;Line 11
 		RETLW	0x3F		;Line 12
		RETLW	0x1F		;Line 13	
		RETLW	0x0F		;Line 14
		RETLW	0x03		;Line 15
		RETLW	0x00		;Line 16

;---------- The table of the 3rd Segment Large degit "7"----------
D7S1
		RETLW	0x00		;Line 1
		RETLW	0x3E		;Line 2
		RETLW	0x3E		;Line 3
		RETLW	0x3E		;Line 4
		RETLW	0x3E		;Line 5
		RETLW	0x3E		;Line 6
		RETLW	0x3E		;Line 7
		RETLW	0x3E		;Line 8
		RETLW	0x3E		;Line 9
		RETLW	0xFE		;Line 10
 		RETLW	0xFE		;Line 11
		RETLW	0xFE		;Line 12
		RETLW	0xFE		;Line 13	
		RETLW	0xFE		;Line 14
		RETLW	0xFE		;Line 15
		RETLW	0x00		;Line 16

;---------- The table of the 2nd Segment Large degit "7"----------
D7S2
		RETLW	0x00		;Line 1
		RETLW	0x00		;Line 2
		RETLW	0x00		;Line 3
		RETLW	0x00		;Line 4
		RETLW	0x00		;Line 5
		RETLW	0xC0		;Line 6
		RETLW	0xF0		;Line 7
		RETLW	0xFC		;Line 8
		RETLW	0xFF		;Line 9
		RETLW	0xFF		;Line 10
		RETLW	0xFF		;Line 11
		RETLW	0x7F		;Line 12
 		RETLW	0x0F		;Line 13
		RETLW	0x03		;Line 14	
		RETLW	0x00		;Line 15
		RETLW	0x00		;Line 16

;---------- The table of the 3rd Segment Large degit "7"----------
D7S3
		RETLW	0x00		;Line 1
		RETLW	0x60		;Line 2
		RETLW	0x78		;Line 3
		RETLW	0x7E		;Line 4
		RETLW	0x7F		;Line 5
		RETLW	0x7F		;Line 6
		RETLW	0x7F		;Line 7
		RETLW	0x7F		;Line 8
		RETLW	0x0F		;Line 9
		RETLW	0x03		;Line 10
		RETLW	0x00		;Line 11
 		RETLW	0x00		;Line 12
		RETLW	0x00		;Line 13	
		RETLW	0x00		;Line 14
		RETLW	0x00		;Line 15
		RETLW	0x00		;Line 16

;---------- The table of the 3rd Segment Large degit "8"----------
D8S1
		RETLW	0x00		;Line 1
		RETLW	0xE0		;Line 2
		RETLW	0xF8		;Line 3
		RETLW	0xFC		;Line 4
		RETLW	0xFE		;Line 5
		RETLW	0xFE		;Line 6
		RETLW	0x3E		;Line 7
		RETLW	0x1E		;Line 8
		RETLW	0x1E		;Line 9
		RETLW	0x3E		;Line 10
 		RETLW	0xFE		;Line 11
		RETLW	0xFE		;Line 12
		RETLW	0xFC		;Line 13	
		RETLW	0xF8		;Line 14
		RETLW	0xF0		;Line 15
		RETLW	0x00		;Line 16

;---------- The table of the 2nd Segment Large degit "8"----------
D8S2
		RETLW	0x00		;Line 1
		RETLW	0xC1		;Line 2
		RETLW	0xE3		;Line 3
		RETLW	0xF7		;Line 4
		RETLW	0xFF		;Line 5
		RETLW	0xFF		;Line 6
		RETLW	0x7E		;Line 7
		RETLW	0x3C		;Line 8
		RETLW	0x3C		;Line 9
		RETLW	0x7C		;Line 10
		RETLW	0xFF		;Line 11
		RETLW	0xFF		;Line 12
 		RETLW	0xF7		;Line 13
		RETLW	0xE3		;Line 14	
		RETLW	0xC1		;Line 15
		RETLW	0x00		;Line 16

;---------- The table of the 3rd Segment Large degit "8"----------
D8S3
		RETLW	0x00		;Line 1
		RETLW	0x0F		;Line 2
		RETLW	0x3F		;Line 3
		RETLW	0x3F		;Line 4
		RETLW	0x7F		;Line 5
		RETLW	0x7F		;Line 6
		RETLW	0x7C		;Line 7
		RETLW	0x78		;Line 8
		RETLW	0x78		;Line 9
		RETLW	0x7C		;Line 10
		RETLW	0x7F		;Line 11
 		RETLW	0x7F		;Line 12
		RETLW	0x3F		;Line 13	
		RETLW	0x1F		;Line 14
		RETLW	0x0F		;Line 15
		RETLW	0x00		;Line 16

;---------- The table of the 3rd Segment Large degit "9"----------
D9S1
		RETLW	0x00		;Line 1
		RETLW	0xF0		;Line 2
		RETLW	0xF8		;Line 3
		RETLW	0xFC		;Line 4
		RETLW	0xFE		;Line 5
		RETLW	0xFE		;Line 6
		RETLW	0x3E		;Line 7
		RETLW	0x3E		;Line 8
		RETLW	0x3E		;Line 9
		RETLW	0x7E		;Line 10
 		RETLW	0xFE		;Line 11
		RETLW	0xFE		;Line 12
		RETLW	0xFC		;Line 13	
		RETLW	0xF8		;Line 14
		RETLW	0xE0		;Line 15
		RETLW	0x00		;Line 16

;---------- The table of the 2nd Segment Large degit "9"----------
D9S2
		RETLW	0x00		;Line 1
		RETLW	0x1F		;Line 2
		RETLW	0x3F		;Line 3
		RETLW	0x3F		;Line 4
		RETLW	0x7F		;Line 5
		RETLW	0x7F		;Line 6
		RETLW	0x3E		;Line 7
		RETLW	0x1C		;Line 8
		RETLW	0x80		;Line 9
		RETLW	0xF0		;Line 10
		RETLW	0xFF		;Line 11
		RETLW	0xFF		;Line 12
 		RETLW	0xFF		;Line 13
		RETLW	0x3F		;Line 14	
		RETLW	0x1F		;Line 15
		RETLW	0x00		;Line 16

;---------- The table of the 3rd Segment Large degit "9"----------
D9S3
		RETLW	0x00		;Line 1
		RETLW	0x00		;Line 2
		RETLW	0x00		;Line 3
		RETLW	0x00		;Line 4
		RETLW	0x60		;Line 5
		RETLW	0x78		;Line 6
		RETLW	0x7C		;Line 7
		RETLW	0x7F		;Line 8
		RETLW	0x7F		;Line 9
		RETLW	0x7F		;Line 10
		RETLW	0x1F		;Line 11
 		RETLW	0x07		;Line 12
		RETLW	0x00		;Line 13	
		RETLW	0x00		;Line 14
		RETLW	0x00		;Line 15
		RETLW	0x00		;Line 16

;---------- The table of the 3rd Segment Large degit "0"----------
D0S1
		RETLW	0x00		;Line 1
		RETLW	0xC0		;Line 2
		RETLW	0xF0		;Line 3
		RETLW	0xF8		;Line 4
		RETLW	0xFC		;Line 5
		RETLW	0x7E		;Line 6
		RETLW	0x3E		;Line 7
		RETLW	0x1E		;Line 8
		RETLW	0x1E		;Line 9
		RETLW	0x3E		;Line 10
 		RETLW	0x7E		;Line 11
		RETLW	0xFE		;Line 12
		RETLW	0xFC		;Line 13	
		RETLW	0xF8		;Line 14
		RETLW	0xF0		;Line 15
		RETLW	0x00		;Line 16

;---------- The table of the 2nd Segment Large degit "0"----------
D0S2
		RETLW	0x00		;Line 1
		RETLW	0xFF		;Line 2
		RETLW	0xFF		;Line 3
		RETLW	0xFF		;Line 4
		RETLW	0xFF		;Line 5
		RETLW	0x00		;Line 6
		RETLW	0x00		;Line 7
		RETLW	0x00		;Line 8
		RETLW	0x00		;Line 9
		RETLW	0x00		;Line 10
		RETLW	0x00		;Line 11
		RETLW	0xFF		;Line 12
 		RETLW	0xFF		;Line 13
		RETLW	0xFF		;Line 14	
		RETLW	0xFF		;Line 15
		RETLW	0x00		;Line 16

;---------- The table of the 3rd Segment Large degit "0"----------
D0S3
		RETLW	0x00		;Line 1
		RETLW	0x07		;Line 2
		RETLW	0x0F		;Line 3
		RETLW	0x1F		;Line 4
		RETLW	0x3F		;Line 5
		RETLW	0x7F		;Line 6
		RETLW	0x7E		;Line 7
		RETLW	0x7C		;Line 8
		RETLW	0x7C		;Line 9
		RETLW	0x7E		;Line 10
		RETLW	0x3F		;Line 11
 		RETLW	0x1F		;Line 12
		RETLW	0x0F		;Line 13	
		RETLW	0x07		;Line 14
		RETLW	0x01		;Line 15
		RETLW	0x00		;Line 16

;---------- 

		ORG 02150H			; EEPROM initial value
		
		DE	02H				; "SSB" at initial boot
		
		ORG	02152H			

		DE	21H				; "1KHz" at initial boot
		DE	01H				; "VFO A" is selected

		ORG	0216CH			

		DE	5EH, 00H, 0D0H, 07H		; VFO A =50.009.4
									; VFO B = 50.200.0
		ORG 02171H

		DE	01H				; Select "VFO" at initial boot

		ORG	021A0H			; Memoey Cahnnel data
		
		DE	0E8H,03H,02H	; Channel 1 = 50.100MHz SSB
		DE	4CH,04H,02H		; Channel 2 = 50.110MHz CW
		DE	0B0H, 04H, 02H	; Channel 3 = 50.120MHz SSB
		DE  14H, 05H, 01H	; Channel 4	= 50.130MHz CW
		DE	78H, 05H, 02H	; Channel 5 = 50.140MHz	SSB
		DE	70H, 17H, 03H	; Channel 6 = 50.600MHz AM
		DE  0D0H, 07H, 02H	; Channel 7 = 50.200MHz SSB
		DE	0C4H, 09H, 01H	; Channel 8 = 50.250MHz CW
		DE	0DCH, 05H, 02H	; Channel 9 = 50.150MHz SSB


		END

